參數(shù)資料
型號: LTC4269IDKD-2#TR
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 560 kHz SWITCHING FREQ-MAX, PDSO32
封裝: 7 X 4 MM, PLASTIC, M0-229, DFN-32
文件頁數(shù): 17/34頁
文件大?。?/td> 383K
代理商: LTC4269IDKD-2#TR
LTC4269-2
42692fb
Programming Oscillator Frequency
The oscillator frequency (fOSC) of the LTC4269-2 is pro-
grammed using an external resistor, ROSC, connected
between the ROSC pin and GND. Figure 11 shows typical
fOSC vs ROSC resistor values. The LTC4269-2 free-run-
ning oscillator frequency is programmable in the range
of 100kHz to 500kHz.
Stray capacitance and potential noise pickup on the ROSC
pin should be minimized by placing the ROSC resistor as
close as possible to the ROSC pin and keeping the area of
the ROSC node as small as possible. The ground side of
theROSCresistorshouldbereturneddirectlytothe(analog
ground) GND pin. ROSC can be calculated by:
ROSC = 9.125k [(4100k/fOSC) – 1]
Programming Leading Edge Blank Time
For PWM controllers driving external MOSFETs, noise
can be generated at the source of the MOSFET during
gate rise time and some time thereafter. This noise can
potentially exceed the OC and ISENSE pin thresholds of the
LTC4269-2 to cause premature turn-off of SOUT and OUT
pinsinadditiontofalsetriggerofsoft-start.TheLTC4269-2
provides a programmable leading edge blanking of the
OC and ISENSE comparator outputs to avoid false current
sensing during MOSFET switching.
Blanking is provided in two phases (Figure 12): The first
phase automatically blanks during gate rise time. Gate rise
timescanvarydependingonMOSFETtype.Forthisreason
the LTC4269-2 performs true ‘leading edge blanking’ by
automatically blanking OC and ISENSE comparator outputs
until OUT rises to within 0.5V of VIN or reaches its clamp
level of 13V. The second phase of blanking starts after
the leading edge of OUT has been completed. This phase
is programmable by the user with a resistor connected
from the BLANK pin to GND. Typical durations for this
portion of the blanking period are from 45ns at RBLANK
= 10k to 540ns at RBLANK = 120k. Blanking duration can
be approximated as:
Blanking (extended) = [45(RBLANK/10k)]ns
(See graph in the Typical Performance Characteristics
section).
Programming Current Limit (OC Pin)
The LTC4269-2 uses a precise 107mV sense threshold
at the OC pin to detect overcurrent conditions in the
converter and set a soft-start latch. It is independent of
duty cycle because it is not affected by slope compensa-
tion programmed at the ISENSE pin. The OC pin monitors
the peak current in the primary MOSFET by sensing the
voltage across a sense resistor (RS) in the source of the
MOSFET. The overcurrent limit for the converter can be
programmed by:
Overcurrent limit = (107mV/RS)(NP/NS) – ()(IRIPPLE)
applicaTions inForMaTion
Figure 11. Oscillator Frequency, fOSC, vs ROSC
ROSC (k)
50
FREQUENCY
(kHz)
400
42692 F11
100 150
250
200
300 350
500
450
400
350
300
250
200
150
100
Figure 12. Leading Edge Blank Timing
RBLANK
(MIN)
= 10k
10k < RBLANK 240k
100ns
(AUTOMATIC)
LEADING
EDGE
BLANKING
(PROGRAMMABLE)
EXTENDED
BLANKING
CURRENT
SENSE
DELAY
OUT
BLANKING
42692 F12
0
Xns X + 45ns
[X + 45(RBLANK/10k)]ns
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