參數(shù)資料
型號: LTC4269IDKD-2#TR
廠商: LINEAR TECHNOLOGY CORP
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 560 kHz SWITCHING FREQ-MAX, PDSO32
封裝: 7 X 4 MM, PLASTIC, M0-229, DFN-32
文件頁數(shù): 20/34頁
文件大小: 383K
代理商: LTC4269IDKD-2#TR
LTC4269-2
42692fb
applicaTions inForMaTion
42692 F16
tDELAY: PROGRAMMABLE SYNCHRONOUS DELAY
FAULTS TRIGGERING SOFT-START
VIN < 8.75V
OR
SD_VSEC < 1.32V (UVLO)
OR
OC > 107mV (OVERCURRENT)
SOFT-START LATCH RESET:
VIN > 14.25V
(> 8.75V IF LATCH SET BY OC)
AND
SD_VSEC > 1.32V
AND
OC < 107mV
AND
SS_MAXDC < 0.45V
SOFT-START
LATCH SET
SOUT
OUT
SS_MAXDC
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.2V
using the SS_MAXDC pin to control soft-start timing. The
proportionalrelationshipbetweenSS_MAXDCvoltageand
switch maximum duty cycle clamp allows the SS_MAXDC
pintoslowlyrampoutputvoltagebyrampingthemaximum
switch duty cycle clamp—until switch duty cycle clamp
seamlessly meets the natural duty cycle of the converter.
A capacitor CSS on the SS_MAXDC pin and the resistor
divider from VREF used to program maximum switch duty
cycle clamp, determine soft-start timing (Figure 18).
A soft-start event is triggered for the following faults:
(1) VIN < 8.75V, or
(2) SD_VSEC < 1.32V (UVLO), or
(3) OC > 107mV (overcurrent condition)
When a soft-start event is triggered, switching at SOUT
and OUT is stopped immediately. A soft-start latch is set
andSS_MAXDCpinisdischarged.TheSS_MAXDCpincan
only recharge when the soft-start latch has been reset.
Note: A soft-start event caused by (1) or (2) above, also
causes VREF to be disabled and to fall to GND.
Soft-start latch reset requires all of the following:
(A) VIN > 14.25V*, and
(B) SD_VSEC > 1.32V, and
(C) OC < 107mV, and
(D) SS_MAXDC < 0.45V (SS_MAXDC reset threshold)
*VIN > 8.75V is okay for latch reset if the latch was only
set by overcurrent condition in (3) above.
SS_MAXDC Discharge Timing
It can be seen in Figure 17 that two types of discharge
can occur for the SS_MAXDC pin. In timing (A) the fault
that caused the soft-start event has been removed be-
fore SS_MAXDC falls to 0.45V. This means the soft-start
latch will be reset when SS_MAXDC falls to 0.45V and
SS_MAXDCwillbegincharging.Intiming(B),thefaultthat
caused the soft-start event is not removed until some time
after SS_MAXDC has fallen past 0.45V. The SS_MAXDC
pin continues to discharge to 0.2V and remains low until
all faults are removed.
Figure 16. Timing Diagram
Figure 17. Soft-Start Timing
Figure 18. Programming Soft-Start Timing
SOFT-START
EVENT TRIGGERED
TIMING (A): SOFT START FAULT REMOVED
BEFORE SS_MAXDC FALLS TO 0.45V
SS_MAXDC
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
42692 F17
TIMING (B): SOFT-START FAULT REMOVED
AFTER SS_MAXDC FALLS PAST 0.45V
SS_MAXDC
0.8V (ACTIVE THRESHOLD)
0.45V (RESET THRESHOLD)
0.2V
SS_MAXDC CHARGING MODEL
SS_MAXDC(DC) = VREF [RB/(RT + RB)]
RCHARGE = [RT RB/(RT + RB)]
SS_MAXDC(DC)
42692 F18
SS_MAXDC
RCHARGE
SS_MAXDC
VREF
LTC4269-2
RB
CSS
RT
CSS
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