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參數(shù)資料
型號: LTC4266IGW#PBF
廠商: Linear Technology
文件頁數(shù): 16/30頁
文件大?。?/td> 0K
描述: IC CTRLR IEEE 802.3AT 36-SSOP
產(chǎn)品培訓模塊: Power over Ethernet
標準包裝: 32
控制器類型: 以太網(wǎng)控制器(IEEE 802.3)
接口: I²C,2 線串口
電源電壓: 3.3V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 36-BSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 36-SSOP
包裝: 管件
產(chǎn)品目錄頁面: 1338 (CN2011-ZH PDF)
LTC4266
23
4266fd
APPLICATIONS INFORMATION
Bypass capacitance between AGND and VEE is very im-
portant for reliable operation. If a short circuit occurs at
one of the output ports it can take as long as 1μs for the
LTC4266 to begin regulating the current. During this time
the current is limited only by the small impedances in the
circuit and a high current spike typically occurs, causing a
voltage transient on the VEE supply and possibly causing
the LTC4266 to reset due to a UVLO fault. A 1μF, 100V
X7R capacitor placed near the VEE pin is recommended
to minimize spurious resets.
Isolating the Serial Bus
The LTC4266 includes a split SDA pin (SDAIN and SDAOUT)
to ease opto-isolation of the bidirectional SDA line.
IEEE 802.3 Ethernet specifications require that network
segments (including PoE circuitry) be electrically isolated
from the chassis ground of each network interface device.
However, network segments are not required to be isolated
from each other, provided that the segments are connected
to devices residing within a single building on a single
power distribution system.
For simple devices such as small PoE switches, the isola-
tion requirement can be met by using an isolated main
power supply for the entire device. This strategy can be
used if the device has no electrically conducting ports
other than twisted-pair Ethernet. In this case, the SDAIN
and SDAOUT pins can be tied together and will act as a
standard I2C/SMBus SDA pin.
If the device is part of a larger system, contains additional
external non-Ethernet ports, or must be referenced to
protective ground for some other reason, the Power over
Ethernet subsystem (including all LTC4266s) must be
electrically isolated from the rest of the system. Figure 18
shows a typical isolated serial interface. The SDAOUT pin
of the LTC4266 is designed to drive the inputs of an opto-
coupler directly. Standard I2C/SMBus devices typically
cannot drive opto-couplers, so U1 is used to buffer the
signals from the host controller side.
External MOSFET
Careful selection of the power MOSFET is critical to system
reliability. LTC recommends either Fairchild IRFM120A,
FDT3612, FDMC3612 or Philips PHT6NQ10T for their
proven reliability in Type 1 and Type 2 PSE applications.
Non-standard applications that provide more current than
the 850mA IEEE maximum may require heat sinking and
other MOSFET design considerations. Contact LTC Ap-
plications before using a MOSFET other than one of these
recommended parts.
Sense Resistor
The LTC4266 is designed to use either 0.5Ω or 0.25Ω
current sense resistors. For new designs 0.25Ω is recom-
mended to reduce power dissipation; the 0.5Ω option is
intended for existing systems where the LTC4266 is used
as a drop-in replacement for the LTC4258 or LTC4259A.
The lower sense resistor values reduce heat dissipation.
Figure 17. Positive VDD Boost Converter
4266 F17
R54
56k
C79
2200pF
GND
ITH/RUN
LTC3803
VCC
2
5
VFB
1
3
NGATE
Q15
FDC2512
Q13
FMMT723
Q14
FMMT723
SENSE
6
4
VEE
C74
100μF
6.3V
C75
10μF
16V
L3
100μH
SUMIDA CDRH5D28-101NC
R51
4.7k
1%
R53
4.7k
1%
R52
3.32k
1%
3.3V AT 400mA
R55
806Ω
1%
R59
0.100Ω
1%, 1W
R56
47.5k
1%
R57
1k
D28
B1100
R58
10Ω
R60
10Ω
C73
10μF
6.3V
L4
10μH
SUMIDA CDRH4D28-100NC
+
C77
0.22μF
100V
C78
0.22μF
100V
C76
10μF
63V
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