參數(shù)資料
型號(hào)： LTC4252-2CMS8
廠商： LINEAR TECHNOLOGY CORP
元件分類： 電源管理
英文描述： Negative Voltage Hot Swap Controllers
中文描述： 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝： PLASTIC, MSOP-8
文件頁(yè)數(shù)： 21/32頁(yè)
文件大?。?/td> 327K
代理商： LTC4252-2CMS8
LTC4252-1/LTC4252-2
21
425212f
APPLICATIU
W
U
U
Figure 9. Power-Up Timing with a Short Pin (All Waveforms are Referenced to V
EE
)
5.8
μ
A
58
μ
A
5.8
μ
A
5.8
μ
A
58
μ
A
GATE
START-UP
INITIAL TIMING
UV CLEARS V
UVHI
, CHECK OV < V
OVHI
, GATE < V
GATEL
, SENSE < V
CB
, SS < 20 V
OS
AND TIMER < V
TMRL
TIMER CLEARS V
TMRL
, CHECK GATE < V
GATEL
, SENSE < V
CB
AND SS < 20 V
OS
1
2
3 4 56
7
89
1011
4252-1/2 F09
GND – V
OR
(–48RTN) – (–48V)
UV/OV
V
IN
TIMER
GATE
SENSE
V
OUT
SS
DRAIN
PWRGD
V
LKO
V
UVHI
V
ACL
V
CB
230
μ
A + 8 I
DRN
20 V
OS
V
IN
– V
GATEH
V
DRNL
V
DRNCL
20 (V
CB
+ V
OS
)
20 (V
ACL
+ V
OS
)
V
GATEL
V
TMRL
V
TMRH
V
IN
ramps through V
LKO
. At time point 2, the UV/OV divider
makes contact and its voltage exceeds V
UVHI
. In addition,
the internal logic checks for OV < V
OVHI
, GATE < V
GATEL
,
SENSE < V
CB
, SS < 20 V
OS
and TIMER < V
TMRL
. If all
conditions are met, an initial timing cycle starts and the
TIMER capacitor is charged by a 5.8
μ
A current source
pull-up. At time point 3, TIMER reaches the V
TMRH
thresh-
old and the initial timing cycle terminates. The TIMER
capacitor is quickly discharged. At time point 4, the V
TMRL
threshold is reached and the conditions of GATE < V
GATEL
,
SENSE < V
CB
and SS < 20 V
OS
must be satisfied before
a GATE start-up cycle begins. SS ramps up as dictated by
R
SS
C
SS
; GATE is held low by the analog current limit
amplifier until SS crosses 20 V
OS
. Upon releasing GATE,
58
μ
A sources into the external MOSFET gate and compen-
sation network. When the GATE voltage reaches the
MOSFET’s threshold, current begins flowing into the load
capacitor at time point 5. At time point 6, load current
reaches the SS control level and the analog current limit
loop activates. Between time points 6 and 8, the GATE
voltage is servoed, the SENSE voltage is regulated at
V
ACL
(t) and soft-start limits the slew rate of the load
current. If the SENSE voltage (V
SENSE
– V
EE
) reaches the
V
CB
threshold at time point 7, the circuit breaker TIMER
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