參數(shù)資料
型號(hào): LTC4252-2CMS8
廠商: LINEAR TECHNOLOGY CORP
元件分類: 電源管理
英文描述: Negative Voltage Hot Swap Controllers
中文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封裝: PLASTIC, MSOP-8
文件頁(yè)數(shù): 16/32頁(yè)
文件大?。?/td> 327K
代理商: LTC4252-2CMS8
LTC4252-1/LTC4252-2
16
425212f
GATE
GATE is pulled low to V
EE
under any of the following
conditions: in UVLO, in an undervoltage condition, in an
overvoltage condition, during the initial timing cycle or
when the circuit breaker fault times out. When GATE turns
on, a 58
μ
A current source charges the MOSFET gate and
any associated external capacitance. V
IN
limits the gate
drive to no more than 14.5V.
Gate-drain capacitance (C
GD
) feedthrough at the first
abrupt application of power can cause a gate-source
voltage sufficient to turn on the MOSFET. A unique circuit
pulls GATE low with practically no usable voltage at V
IN
and eliminates current spikes at insertion. A large external
gate-source capacitor is thus unnecessary for the purpose
of compensating C
GD
. Instead, a smaller value (
10nF)
capacitor C
C
is adequate. C
C
also provides compensation
for the analog current limit loop.
GATE has two comparators: the GATE low comparator
looks for < 0.5V threshold prior to initial timing or a GATE
start-up cycle; the GATE high comparator looks for < 2.8V
relative to V
IN
and, together with the DRAIN low compara-
tor, sets PWRGD status during GATE startup.
SENSE
The SENSE pin is monitored by the circuit breaker (CB)
comparator, the analog current limit (ACL) amplifier and
the fast current limit (FCL) comparator. Each of these three
measures the potential of SENSE relative to V
EE
. When
SENSE exceeds 50mV, the CB comparator activates the
230
μ
A TIMER pull-up. At 100mV, the ACL amplifier servos
the MOSFET current and, at 200mV, the FCL comparator
abruptly pulls GATE low in an attempt to bring the MOSFET
current under control. If any of these conditions persists
long enough for TIMER to charge C
T
to 4V (see Equa-
tion3), the LTC4252 shuts down and pulls GATE low.
If the SENSE pin encounters a voltage greater than 100mV,
the ACL amplifier will servo GATE downwards in an
attempt to control the MOSFET current. Since GATE over-
drives the MOSFET in normal operation, the ACL amplifier
needs time to discharge GATE to the threshold of the
MOSFET. For a mild overload the ACL amplifier can control
the MOSFET current, but in the event of a severe overload
the current may overshoot. At SENSE = 200mV the FCL
comparator takes over, quickly discharging the GATE pin
to near V
EE
potential. FCL then releases and the ACL
amplifier takes over. All the while TIMER is running. The
effect of FCL is to add a nonlinear response to the control
loop in favor of reducing MOSFET current.
Owing to inductive effects in the system, FCL typically
overcorrects the current limit loop and GATE under-
shoots. A zero in the loop (resistor R
C
in series with the
gate capacitor) helps the ACL amplifier to recover.
SHORT-CIRCUIT OPERATION
Circuit behavior arising from a load side low impedance
short is shown in Figure 5 for the LTC4252. Initially, the
current overshoots the fast current limit level of V
SENSE
=
200mV (Trace 2) as the GATE pin works to bring V
GS
under
control (Trace 3). The overshoot glitches the backplane in
the negative direction and when the current is reduced to
100mV/R
S
, the backplane responds by glitching in the
positive direction.
APPLICATIU
W
U
U
4252-1/2 F05
–48RTN
50V/DIV
GATE
10V/DIV
SENSE
200mV/DIV
TIMER
5V/DIV
0.5ms/DIV
FAST CURRENT LIMIT
SUPPLY RING OWING TO
CURRENT OVERSHOOT
SUPPLY RING OWING TO
MOSFET TURN OFF
ANALOG CURRENT LIMIT
ONSET OF OUTPUT SHORT-CIRCUIT
C
TIMER
RAMP
LATCH OFF
Figure 5. Output Short-Circuit Behavior of LTC4252
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