參數(shù)資料
型號(hào)： LTC4245CG#TRPBF
廠商： Linear Technology
文件頁(yè)數(shù)： 18/36頁(yè)
文件大小： 431K
描述： IC CNTRLR HOT SWAP 36-SSOP
標(biāo)準(zhǔn)包裝： 1,000
類(lèi)型： 熱交換控制器
應(yīng)用： CompactPCI?
內(nèi)部開(kāi)關(guān)： 無(wú)
電源電壓： 3.3V，5V，12V
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 36-SSOP（0.209"，5.30mm 寬）
供應(yīng)商設(shè)備封裝： 36-SSOP
包裝： 帶卷 (TR)
LTC4245
18
4245fa
When the sequence bit C6 is set, setting the On control
bit of a supply, through the I
2
C interface, starts the supply
turn-on sequence from that supply onwards. For example,
setting bit D1 will turn-on 5V, 3.3V, 12V supplies, in that
order. A logic one can then be written to bit D0 to ramp
the 12V supply. At the end of this ramp-up, bit D1 is set.
But since 5V is already powered-up, the sequence stops
there.
The I
2
C interface provides the most  exibility in turning
supplies on and off. With bit C6 cleared, any supply or
supplies can be turned on by setting their On control
bits. The On control bits cannot be set when any supply
is ramping (therefore using TIMER and SS pins). The SS
busy bit, A1, indicates this blanking period. The On control
bits can be reset though, even when a supply is ramping.
Two or more On control bits may be set at the same time
to ramp multiple supplies in the same timing cycle. When
all supplies are turned on the LTC4245 goes through the
PGI timing cycle.
Supply Voltage Con guration
The CFG pin enables the LTC4245 to be used in non-CPCI
applications. It is a three-state input pin. In a CPCI applica-
tion with all four supplies, the CFG pin is tied to ground.
Floating the CFG pin disables the V
EE
 undervoltage lockout
(UVLO), start-up foldback and power bad functions. It also
makes the ?2V turn-ons coincident by using the 12V FET
On control bit, D0, to control the 12V supply MOSFET.
This allows the three positive supplies to power-up and
HEALTHY# to assert, even when a negative supply is
either unavailable or does not meet the required thresh-
olds. If unused the V
EEIN
, V
EESENSE
, V
EEGATE
 and V
EEOUT
 
pins should be tied to ground. Since the circuit breaker
and active current limit circuits are not disabled, a lower
negative supply could be hot plugged. It would turn on
whenever the 12V supply turns on. Care should be taken
that the supply does not collapse under overcurrent con-
ditions. At low supplies, the ECB and ACL circuits stop
functioning. With the UVLO already disabled, the LTC4245
may not detect a fault condition on the V
EE
 supply. Large
currents, limited only by MOSFET and sense resistances,
could  ow, potentially damaging the board traces and
connector pins.
If the CFG pin is tied high, the 5V supply thresholds change
to 3.3V levels, while keeping the  oating state functionality.
The 5V supply UVLO, power bad thresholds and foldback
pro le become similar to those of the 3.3V supply. The
5V
IN
 and 5V
OUT
 inputs to the ADC use the same LSB and
full-scale as the 3V
IN
 and 3V
OUT
 pins. This allows the use
of an extra 3.3V supply instead of a 5V supply as in a PCI
Express application.
Overcurrent Fault
The LTC4245 has different current limiting behavior dur-
ing start-up, when supply ramps up under TIMER and SS
control, and normal operation. As such it can generate an
overcurrent fault during both phases of operation. Both
set the faulting supplys overcurrent fault bit (bits E4 to
E7) and shut off all external FETs.
During start-up when both TIMER and SS are ramping,
the current limit is a function of SS pin voltage and the
ramping supplies output voltages. A supply could power
up entirely in current limit depending on the bypass ca-
pacitor at the outputs of the ramping supplies. The TIMER
pin sets the time duration for current limit during start-up.
This time involves the TIMER charging up to 2.56V with a
100糀 current source and then resetting to 0.23V with a
switch. At the end of the timing cycle if the supply is still
in current limit, i.e., the gate of its external MOSFET is still
being actively controlled, an overcurrent fault is declared
for that supply and all MOSFETs are shut off (Figure 6).
Therefore the maximum time a supply can stay in current
limit at start-up is given by:
 
t
C   K
C
ms    F
START
T    TMCAP
T
=
=
?/DIV>
?/DIV>
?/DIV>
?/DIV>
"
"   .
/
23 3
?/DIV>
 
(4)
APPLICATIO  S I FOR  ATIO
U
U
U
Figure 6. Start-Up Into a Short on 3.3V Output
TIME 10ms/DIV
4245 F06
3.3V SUPPLY
CURRENT 2.5A/DIV
3V
GATE
 2.5V/DIV
SS 2.5V/DIV
TIMER 2.5V/DIV
ON 5V/DIV
12V
OUT
, 5V
OUT
3V
OUT
, V
EEOUT
,
10V/DIV
HEALTHY#
5V/DIV
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