16
LTC4221
4221fa
ON1 clears its off threshold and the initial timing cycle is
complete, the GATE1 pin is pulled up by a 9.5糀 current
source connected to the charge pump output during the
channel start-up cycle. GATE1 can be servoed by adjusting
the ramp up current to <9.5糀 to control the inrush
current to the load during start-up. ON2 controls GATE2 in
a similar manner but is overwritten by ON1s global reset
function. During an overcurrent fault condition that sets
the fault latch, both GATE pins are pulled down by their
respective internal N-channel MOSFET pull-downs.
During hot insertion of the PCB, an abrupt application of
supply voltage charges the external MOSFET drain/gate
capacitance. This can cause an unwanted gate voltage
spike. An internal proprietary circuit holds both GATE pins
low before the internal circuitry wakes up. This reduces the
MOSFET current surges substantially at insertion.
Electronic Circuit Breaker
The LTC4221 features an electronic circuit breaker func-
tion that protects against supply overvoltage, externally
generated fault conditions and shorts or excessive load
current conditions on any of the supplies. If the circuit
breaker trips, both GATE pins are immediately pulled to
ground, the external N-channel MOSFETs are quickly
turned OFF and FAULT is latched low.
During the normal cycle, a supply overvoltage on channeln
propagates via the V
OUTn
resistive dividers to the FBn pin.
A supply overvoltage high enough to pull either FB pin
above 0.822V for more than 18約 will trip the circuit
breaker.
The circuit breaker can also be made to trip by externally
forcing the bidirectional FAULT pin below 0.816V. The
FAULT pin has 35mV of hysteresis. An internal glitch filter
of 15約 filters out noise on the FAULT pin.
The slow comparator of channeln trips the circuit breaker
if V
RSENSEn
= (V
CCn
V
SENSEn
) is greater than its 25mV
threshold for more than 15約. There may be applications
where this inherent response time is not long enough, for
example, because of excessive supply voltage noise. To
adjust the response time of the slow comparator, a capaci-
tor can be connected from the FILTER pin to GND. If this
pin is left unused, each slow comparators delay defaults
to 15約. During normal operation, the FILTER output pin
is held low by an internal 1.8糀 pull-down current source.
During an overcurrent condition on either channel as
shown in Figure 6, the 1.8糀 pull-down on the FILTER pin
becomes an internal 105糀 pull-up and C
FILTER
charges
up. Once the FILTER pin voltage ramps past its low-to-
high threshold of 1.24V at time point 2, the electronic
circuit breaker trips and the LTC4221 shuts down. The
FILTER pins internal 1.8糀 pull-down discharges C
FILTER
and holds FILTER low. Each slow comparators response
time from an overcurrent fault condition is:
t
V  C
A
s
FILTER
FILTER
=
?/DIV>
+   ?/DIV>
1 24
105
15
.
"
(1)
Intermittent overloads may exceed the current limit as in
Figure 7, but if the duration is sufficiently short, the FILTER
pin may not reach the V
FILTER(TH)
threshold and the
LTC4221 will not shut down. To handle this situation, the
FILTER discharges with 1.8糀 whenever both V
RSENSE
are
below 25mV. Any intermittent overload with an aggregate
APPLICATIO S I FOR ATIO
U
U
U
Figure 7. Multiple Intermittent Overcurrent Condition
A1
B1    A2
B2    A3  B3
~25mV/R
SENSE1
~25mV/R
SENSE2
CIRCUIT BREAKER
TRIPS
1.8糀
1.8糀
4221 F07
1.8糀
105糀
105糀
105糀
I
LOAD1
I
LOAD2
V
FILTER
V
GATE
1.24V
1.8糀
SLOW
COMPARATOR
TRIP
SLOW
COMPARATOR
TRIP
SLOW
COMPARATOR
TRIP
Figure 6. A Continuous Fault Timing
1.24V
1
2
NORMAL
SLOW
COMPARATOR
TRIP
V
FILTER
CIRCUIT BREAKER TRIPS.
GATE1, GATE2 AND
FAULT PULL LOW
1.8糀
1.8糀
4221 F06
1.8糀
105糀
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