參數(shù)資料
型號(hào)： LTC2284UP
廠商： Linear Technology Corporation
英文描述： Dual 14-Bit, 105Msps Low Power 3V ADC
中文描述： 雙14位，105Msps ADC的低功耗3V的
文件頁(yè)數(shù)： 15/24頁(yè)
文件大?。?/td> 687K
代理商： LTC2284UP
LTC2284
15
2284fa
V
CM
SENSE
1.5V
0.75V
2.2
μ
F
12k
1
μ
F
12k
2284 F10
LTC2284
V
CM
REFH
SENSE
TIE TO V
DD
FOR 2V RANGE;
TIE TO V
FOR 1V RANGE;
RANGE = 2 V
SENSE
FOR
0.5V < V
SENSE
< 1V
1.5V
REFL
2.2
μ
F
2.2
μ
F
INTERNAL ADC
HIGH REFERENCE
BUFFER
0.1
μ
F
2284 F09
4
DIFF AMP
1
μ
F
1
μ
F
INTERNAL ADC
LOW REFERENCE
1.5V BANDGAP
REFERENCE
1V
0.5V
RANGE
DETECT
AND
CONTROL
LTC2284
APPLICATIOU
Reference Operation
Figure 9 shows the LTC2284 reference circuitry consisting
of a 1.5V bandgap reference, a difference amplifier and
switching and control circuit. The internal voltage refer-
ence can be configured for two pin selectable input ranges
of 2V (
±
1V differential) or 1V (
±
0.5V differential). Tying the
SENSE pin to V
DD
selects the 2V range; tying the SENSE
pin to V
CM
selects the 1V range.
The 1.5V bandgap reference serves two functions: its
output provides a DC bias point for setting the common
mode voltage of any external input circuitry; additionally,
the reference is used with a difference amplifier to gener-
ate the differential reference levels needed by the internal
ADC circuitry. An external bypass capacitor is required for
the 1.5V reference output, V
CM
. This provides a high
frequency low impedance path to ground for internal and
external circuitry.
W
U
U
The difference amplifier generates the high and low refer-
ence for the ADC. High speed switching circuits are
connected to these outputs and they must be externally
bypassed. Each output has two pins. The multiple output
pins are needed to reduce package inductance. Bypass
capacitors must be connected as shown in Figure 9. Each
ADC channel has an independent reference with its own
bypass capacitors. The two channels can be used with the
same or different input ranges.
Other voltage ranges between the pin selectable ranges
can be programmed with two external resistors as shown
in Figure 10. An external reference can be used by applying
its output directly or through a resistor divider to SENSE.
It is not recommended to drive the SENSE pin with a logic
device. The SENSE pin should be tied to the appropriate
level as close to the converter as possible. If the SENSE pin
is driven externally, it should be bypassed to ground as
close to the device as possible with a 1
μ
F ceramic capacitor.
For the best channel matching, connect an external reference
to SENSEA and SENSEB.
Figure 10. 1.5V Range ADC
Figure 9. Equivalent Reference Circuit
Input Range
The input range can be set based on the application. The
2V input range will provide the best signal-to-noise perfor-
mance while maintaining excellent SFDR. The 1V input
range will have better SFDR performance, but the SNR will
degrade by 5.7dB. See the Typical Performance Charac-
teristics section.
Driving the Clock Input
The CLK inputs can be driven directly with a CMOS or TTL
level signal. A sinusoidal clock can also be used along with
a low jitter squaring circuit before the CLK pin (Figure 11).
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