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參數(shù)資料
| 型號： | LTC2284UP |
| 廠商： | Linear Technology Corporation |
| 英文描述： | Dual 14-Bit, 105Msps Low Power 3V ADC |
| 中文描述： | 雙14位，105Msps ADC的低功耗3V的 |
| 文件頁數(shù)： | 12/24頁 |
| 文件大?。?/td> | 687K |
| 代理商： | LTC2284UP |
LTC2284
2284fa
12
V
DD
V
DD
V
DD
15
15
C
PARASITIC
1pF
C
PARASITIC
1pF
C
SAMPLE
4pF
C
SAMPLE
LTC2284
A
IN
+
A
IN
–
CLK
2284 F02
applications, the analog inputs can be driven single-ended
with slightly worse harmonic distortion. The CLK input is
single-ended. The LTC2284 has two phases of operation,
determined by the state of the CLK input pin.
Each pipelined stage shown in Figure 1 contains an ADC,
a reconstruction DAC and an interstage residue amplifier.
In operation, the ADC quantizes the input to the stage and
the quantized value is subtracted from the input by the
DAC to produce a residue. The residue is amplified and
output by the residue amplifier. Successive stages operate
out of phase so that when the odd stages are outputting
their residue, the even stages are acquiring that residue
and vice versa.
When CLK is low, the analog input is sampled differentially
directly onto the input sample-and-hold capacitors, inside
the “Input S/H” shown in the block diagram. At the instant
that CLK transitions from low to high, the sampled input is
held. While CLK is high, the held input voltage is buffered
by the S/H amplifier which drives the first pipelined ADC
stage. The first stage acquires the output of the S/H during
this high phase of CLK. When CLK goes back low, the first
stage produces its residue which is acquired by the
second stage. At the same time, the input S/H goes back
to acquiring the analog input. When CLK goes back high,
the second stage produces its residue which is acquired
by the third stage. An identical process is repeated for the
APPLICATIU
W
U
U
third, fourth and fifth stages, resulting in a fifth stage
residue that is sent to the sixth stage ADC for final
evaluation.
Each ADC stage following the first has additional range to
accommodate flash and amplifier offset errors. Results
from all of the ADC stages are digitally synchronized such
that the results can be properly combined in the correction
logic before being sent to the output buffer.
SAMPLE/HOLD OPERATION AND INPUT DRIVE
Sample/Hold Operation
Figure 2 shows an equivalent circuit for the LTC2284
CMOS differential sample-and-hold. The analog inputs are
connected to the sampling capacitors (C
SAMPLE
) through
NMOS transistors. The capacitors shown attached to each
input (C
PARASITIC
) are the summation of all other capaci-
tance associated with each input.
During the sample phase when CLK is low, the transistors
connect the analog inputs to the sampling capacitors and
they charge to and track the differential input voltage.
When CLK transitions from low to high, the sampled input
voltage is held on the sampling capacitors. During the hold
phase when CLK is high, the sampling capacitors are
disconnected from the input and the held voltage is passed
to the ADC core for processing. As CLK transitions from
Figure 2. Equivalent Input Circuit
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LTC2285 | 制造商:LINER 制造商全稱:Linear Technology 功能描述:4GHz to 6GHz High Dynamic Range Downconverting Mixer |
| LTC2285CUP | 制造商:Linear Technology 功能描述:ADC Dual Pipelined 125Msps 14-bit Parallel 64-Pin QFN EP |
| LTC2285CUP#PBF | 功能描述:IC ADC DUAL 14BIT 125MSPS 64QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
| LTC2285CUP#TRPBF | 功能描述:IC ADC DUAL 14BIT 125MSPS 64QFN RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- 位數(shù):12 采樣率（每秒）:1.8M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:1.82W 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-LQFP 供應(yīng)商設(shè)備封裝:48-LQFP（7x7） 包裝:管件 輸入數(shù)目和類型:2 個單端，單極 |
| LTC2285CUP-PBF | 制造商:LINER 制造商全稱:Linear Technology 功能描述:Dual 14-Bit, 125Msps Low Power 3V ADC |
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