參數資料
型號： LTC2184IUP#TRPBF
廠商： LINEAR TECHNOLOGY CORP
元件分類： ADC
英文描述： 2-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
封裝： 9 X 9 MM, LEAD FREE, PLASTIC, MO-220WNJR-5, QFN-64
文件頁數： 34/36頁
文件大小： 799K
代理商： LTC2184IUP#TRPBF
7
218543f
LTC2185/LTC2184/LTC2183
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 9)
SYMBOL PARAMETER
CONDITIONS
LTC2185
LTC2184
LTC2183
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
CMOS Output Modes: Full Data Rate and Double Data Rate
VDD
Analog Supply Voltage (Note 10)
l
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
OVDD
Output Supply Voltage
(Note 10)
l
1.1
1.8
1.9
1.1
1.8
1.9
1.1
1.8
1.9
V
IVDD
Analog Supply Current DC Input
Sine Wave Input
l
206
209
228
171
173
188
111
113
124
mA
IOVDD
Digital Supply Current
Sine Wave Input, OVDD = 1.2V
10
8
6
mA
PDISS
Power Dissipation
DC Input
Sine Wave Input, OVDD = 1.2V
l
370
388
410
308
321
339
200
211
223
mW
LVDS Output Mode
VDD
Analog Supply Voltage (Note 10)
l
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
OVDD
Output Supply Voltage
(Note 10)
l
1.7
1.8
1.9
1.7
1.8
1.9
1.7
1.8
1.9
V
IVDD
Analog Supply Current Sine Input, 1.75mA Mode
Sine Input, 3.5mA Mode
l
211
213
233
175
177
193
115
117
128
mA
IOVDD
Digital Supply Current
(0VDD = 1.8V)
Sine Input, 1.75mA Mode
Sine Input, 3.5mA Mode
l
40
76
86
40
75
85
39
75
84
mA
PDISS
Power Dissipation
Sine Input, 1.75mA Mode
Sine Input, 3.5mA Mode
l
452
520
574
387
454
500
277
346
382
mW
All Output Modes
PSLEEP
Sleep Mode Power
1
mW
PNAP
Nap Mode Power
16
mW
PDIFFCLK Power Increase with Differential Encode Mode Enabled
(No increase for Nap or Sleep Modes)
20
mW
TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 5)
SYMBOL PARAMETER
CONDITIONS
LTC2185
LTC2184
LTC2183
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
fS
Sampling Frequency
(Note 10)
l
1
125
1
105
1
80
MHz
tL
ENC Low Time (Note 8) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
3.8
2
4
500
4.52
2
4.76
500
5.93
2
6.25
500
ns
tH
ENC High Time (Note 8) Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
l
3.8
2
4
500
4.52
2
4.76
500
5.93
2
6.25
500
ns
tAP
Sample-and-Hold
Acquisition Delay Time
0
ns
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Digital Data Outputs (CMOS Modes: Full Data Rate and Double Data Rate)
tD
ENC to Data Delay
CL = 5pF (Note 8)
l
1.1
1.7
3.1
ns
tC
ENC to CLKOUT Delay
CL = 5pF (Note 8)
l
1
1.4
2.6
ns
tSKEW
DATA to CLKOUT Skew
tD – tC (Note 8)
l
0
0.3
0.6
ns
Pipeline Latency
Full Data Rate Mode
Double Data Rate Mode
6
6.5
Cycles
相關PDF資料
PDF描述
LTC2183CUP#TRPBF 2-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2184IUP#PBF 2-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2185IUP#PBF 2-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2183IUP#PBF 2-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
LTC2184CUP#TRPBF 2-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC64
相關代理商/技術參數
參數描述
LTC2185 制造商:LINER 制造商全稱:Linear Technology 功能描述:30MHz to 1.4GHz IQ Demodulator
LTC2185CUP#PBF 制造商:Linear Technology 功能描述:ADC Dual 125Msps 16-bit Parallel/Serial (SPI)/LVDS 64-Pin QFN EP 制造商:Linear Technology 功能描述:IC ADC 16BIT 125M SRL/PAR 64-QFN
LTC2185CUP#PBF-ES 制造商:Linear Technology 功能描述:ADC Dual 125Msps 16-bit Parallel/Serial (SPI)/LVDS 64-Pin QFN EP
LTC2185CUP#TRPBF 制造商:Linear Technology 功能描述:ADC Dual 125Msps 16-bit Parallel/Serial (SPI)/LVDS 64-Pin QFN EP T/R 制造商:Linear Technology 功能描述:IC ADC 16BIT 125M SRL/PAR 64-QFN
LTC2185CUP#TRPBF-ES 制造商:Linear Technology 功能描述:ADC Dual 125Msps 16-bit Parallel/Serial (SPI)/LVDS 64-Pin QFN EP T/R
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