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7266R1-011498-6
Transient Characteristics
. (T
A
= -25C to +80C, V
DD
= 4.5V to 5.5V)
Parameter Symbol Min. Value Max.Value Unit Remarks
Read Cycle
(See Fig. 1)
RD Pulse Width
t
r1
50
CS Set-up Time
t
r2
50
CS Hold Time
t
r3
0
C/D Set-up Time
t
r4
50
C/D Hold Time
t
r5
10
X/Y Set-up Time
t
r6
50
X/Y Hold Time
t
r7
10
Data Bus Access Time
t
r8
50
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
-
Access starts when both RD
and CS are low.
Release starts when either RD
or CS is terminated.
-
Data Bus Release Time
t
r9
-
25
ns
Back to Back Read delay
t
r10
60
-
ns
Write Cycle
(See Fig. 2)
WR Pulse Width
CS Set-up Time
CS Hold Time
C/D Set-up Time
C/D Hold Time
X/Y Set-up Time
X/Y Hold Time
Data Bus Set-up Time
Data Bus Hold Time
Back to Back Write Delay
t
W1
t
W2
t
W3
t
W4
t
W5
t
W6
t
W7
t
W8
t
W9
30
30
0
30
10
30
10
30
10
60
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
-
-
-
-
-
-
t
W10
Quadrature Mode
(See Fig. 3-5)
FCK High Pulse Width
FCK Low Pulse Width
FCK Frequency
Mod-n Filter Clock(FCKn)Period
t
1
t
2
f
FCK
t
3
14
14
-
28
-
-
35
-
ns
ns
MHz
ns
-
-
-
t
3
= (n+1) (t
1
+t
2
), where
n = PSC = 0 to FF
H
-
t
4
≥
2t
3
t
5
≥
4t
3
f
QA
= f
QB
= 1/8t
3
-
t
Q2
= t
3
t
idx
≥
3t
3
t
Ai
≤
t
3
t
Q3
= t
3
FCKn frequency
Quadrature Separation
Quadrature Clock Pulse Width
Quadrature Clock frequency
Quadrature Clock to Count Delay
X1/X2/X4 Count Clock Pulse Width t
Q2
Index Input Pulse Width
Index Skew from A
Carry/Borrow/Compare Output Width
f
FCKn
t
4
t
5
f
QA
,
f
QB
t
Q1
-
57
115
-
5t
3
28
85
-
28
35
-
-
4.3
6t
3
-
-
28
-
MHz
ns
ns
MHz
-
ns
ns
ns
ns
t
idx
t
Ai
t
Q3
Non-Quadrature Mode
(See Fig. 6-7)
Clock A - High Pulse Width
Clock A - Low Pulse Width
Direction Input B Set-up Time
Direction Input B Hold Time
Gate Input (ABG) Set-up Time
Gate Input (ABG) Hold Time
Clock Frequency (non-Mod-N)
Clock Frequency (Mod-N)
t
6
t
7
t
8S
t
8H
t
GS
t
GH
f
A
f
AN
16
16
20
20
20
20
-
-
-
-
-
-
-
-
30
25
ns
ns
ns
ns
ns
ns
MHz
MHz
-
-
-
-
-
-
f
A
= (1/ (t
6
+ t
7
) )
-
Clock to Carry or Borrow Out Delay
Carry or Borrow Out Pulse Width
Load CNTR, Reset CNTR and
Load OL Pulse Width
Clock to Compare Out Delay
t
9
t
10
-
16
30
-
ns
ns
-
t
10
= t
7
t
11
t
12
20
50
-
-
ns
ns
-
-