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參數(shù)資料
| 型號(hào)： | LMX2331A |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | PLLatinum⑩ Dual Frequency Synthesizer for RF Personal Communications |
| 中文描述： | PLLatinum⑩雙頻率合成射頻個(gè)人通信 |
| 文件頁(yè)數(shù)： | 11/17頁(yè) |
| 文件大小： | 392K |
| 代理商： | LMX2331A |
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Functional Description
(Continued)
PROGRAMMABLE DIVIDER (N COUNTER)
The N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B counter). If the Control
Bits are 10 or 11 (10 for IF counter and 11 for RF counter) data is transferred from the 22-bit shift register into a 4-bit or 7-bit latch
(which sets the Swallow (A) Counter) and an 11-bit latch (which sets the 11-bit programmable (B) Counter), MSB first. Serial data
format is shown below.
For the IF N counter bits 5, 6, and 7 are don’t care bits.
The RF N counter does not have don’t care
bits.
7-BIT SWALLOW COUNTER DIVIDE RATIO (A COUNTER)
RF
Divide
Ratio
A
0
1
127
N
7
N
6
N
5
N
4
N
3
N
2
N
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
Note:
Divide ratio: 0 to 127
B
≥
A
IF
Divide
Ratio
A
0
1
15
N
7
N
6
N
5
N
4
N
3
N
2
N
1
X
X
X
X
X
X
X
X
X
0
0
1
0
0
1
0
0
1
0
1
1
X = DON’T CARE condition
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO (B COUNTER)
Divide
Ratio
B
3
4
2047
N
18
N
17
N
16
N
15
N
14
N
13
N
12
N
11
N
10
N
9
N
8
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
1
1
1
0
1
1
0
1
Note:
Divide ratio: 3 to 2047 (Divide ratios less than 3 are prohibited)
B
≥
A
PULSE SWALLOW FUNCTION
f
VCO
= [(P x B) + A] x f
OSC
/R
f
VCO
:
Output frequency of external voltage controlled oscillator (VCO)
B:
Preset divide ratio of binary 11-bit programmable counter (3 to 2047)
A:
Preset divide ratio of binary 7-bit swallow counter
(0
≤
A
≤
127 {RF}, 0
≤
A
≤
15 {IF}, A
≤
B)
f
OSC
:
Output frequency of the external reference frequency oscillator
R:
Preset divide ratio of binary 15-bit programmable reference counter (3 to 32767)
P:
Preset modulus of dual moduIus prescaler (for
IF
; P = 8 or 16;
for
RF
; LMX2330A: P = 32 or 64
LMX2331A/32A: P = 64 or 128)
PROGRAMMABLE MODES
Several modes of operation can be programmed with bits R16–R20 including the phase detector polarity, charge pump
TRI-STATE and the output of the F
LD pin. The prescaler and powerdown modes are selected with bits N19 and N20. The pro-
grammable modes are shown in Table 1 Truth table for the programmable modes and F
o
LD output are shown in Table 2 and
Table 3
DS012331-15
www.national.com
11
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2331ATM | 制造商:Texas Instruments 功能描述: |
| LMX2331ATMX | 功能描述:IC FREQ SYNTH DUAL 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| LMX2331L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LMX2331LSLB | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2331LSLBX | 制造商:Texas Instruments 功能描述: |
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