參數(shù)資料
型號(hào)： LM9800CCV
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 模擬信號(hào)調(diào)理
英文描述： 8-Bit Greyscale/24-Bit Color Linear CCD Sensor Processor
中文描述： SPECIALTY ANALOG CIRCUIT, PQCC52
封裝： PLASTIC, LCC-52
文件頁(yè)數(shù)： 7/34頁(yè)
文件大?。?/td> 619K
代理商： LM9800CCV
Electrical Characteristics (Notes)
(Continued)
Note 11:
Integral linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that best fits the actual transfer function
of the ADC.
Note 12:
V
is defined as the CCD OS voltage for the reference period following the reset feedthrough pulse. V
is defined as the peak CCD pixel output
voltage for a white (full scale) image with respect to the reference level, V
REF
. V
RFT
is defined as the peak positive deviation above V
REF
of the reset feedthrough
pulse. The maximum correctable range of pixel-to-pixel V
variation is defined as the maximum variation in V
WHITE
(due to PRNU, light source intensity varia-
tion, optics, etc.) that the LM9800 can correct for using its internal PGA.
Note 13:
Reference voltages below 1.19V may decrease SNR. Reference voltages above 1.26V may cause clipping errors inside the LM9800. The
LM4041EIM3-1.2 (SOT-23 package) or the LM4041EIZ-1.2 (TO-92 package) bandgap voltage references are recommended for this application.
Typical Performance Characteristics
Pin Descriptions
CCD Driver Signals
Digital Output. CCD clock signal, phase
1.
Digital Output. CCD clock signal, phase
2.
Digital Output. Reset pulse for the CCD.
Digital Output. Transfer pulse for the
CCD.
Analog I/O
Analog Input. This is the OS (Output
Signal) from the CCD. The maximum
peak signal that can be accurately
digitized is equal to the voltage at REF
IN, typically 1.225V.
Analog Input. The voltage on this pin
determines the gain of the VGA when
the VGA is enabled. This input should
be bypassed to AGND using a 0.1 μF
monolithic capacitor.
φ
1
φ
2
RS
TR
OS
GAIN
REF IN
Analog Inputs. These two pins are the
system reference voltage inputs and
should be tied together to a 1.225V
voltage source and bypassed to AGND
with a 0.1 μF monolithic capacitor.
Analog Output. This reference voltage is
developed internally by the LM9800, and
is equal to 3 times REF IN. It should be
bypassed to AGND with a 0.1 μF
monolithic capacitor.
Analog Output. This reference voltage is
developed internally by the LM9800, and
is equal to 2 times REF IN. It should be
bypassed to AGND using a 0.1 μF
monolithic capacitor. This pin can
source up to 250 μA when used to
power a voltage divider for setting the
voltage at the GAIN input.
Analog Input. This input is used to set
internal bias currents inside the LM9800.
It should be connected to V
A
through a
75 k
resistor.
REF OUT
HI
REF OUT
MID
I
SET
DS012498-5
VGA Gain vs Voltage on GAIN Input
DS012498-48
φ
1,
φ
2, RS, TR Rise and Fall Times Through a
Series Resistance vs. Load Capacitance
DS012498-49
7
www.national.com
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