參數(shù)資料
型號: LM9800CCV
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號調(diào)理
英文描述: 8-Bit Greyscale/24-Bit Color Linear CCD Sensor Processor
中文描述: SPECIALTY ANALOG CIRCUIT, PQCC52
封裝: PLASTIC, LCC-52
文件頁數(shù): 18/34頁
文件大?。?/td> 619K
代理商: LM9800CCV
Configuration Register
t
MCLK
= 1/f
MCLK
= 1 MCLK period. Examples given in parenthesis are for f
MCLK
=
20MHz (t
MCLK
= 50ns).
TABLE 1. Configuration Register Address Table
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
Standard
Mode or
Even/Odd
Mode
MODE
RS
Pulse
Width
RS
Pulse
Polarity
RS Pulse Position
(Minimum Value is 1)
RSW1
Sample Reference Position
SR2
φ
2
Enable
φ
2EN
RSW0
RSPOL
RSPOS3
RSPOS2
Sample Signal Position
SS2
RSPOS1
RSPOS0
0
0
1
SR3
φ
1
Enable
φ
1EN
SR1
RS
Enable
RSEN
SR0
TR
Enable
TREN
SS3
SS1
TR–
φ
1
Guardband
TRGRD
SS0
TR
Polarity
TRPOL
0
1
0
TR Pulse Width
TRW1
TRW0
0
1
1
Dummy Pixels (Minimum Value is 1)
BLS5
BLS4
Optical Black Pixels (Minimum Value is 1)
BLL5
BLL4
PGA Gain Coefficient
GAIN5
GAIN4
Power-
Offset
down
Add
PD
OFFADD
Offset DAC
Offset DAC
LSB
VOS1
VOS0
BLS7
BLS6
BLS3
BLS2
BLS1
BLS0
1
0
0
BLL7
BLL6
BLL3
BLL2
BLL1
BLL0
1
0
1
0
GAIN6
Test
Mode
0
Offset DAC
MSB
VOS2
GAIN3
VGA
On/Off
VGA
GAIN2
VGA State
Pixel c
G3
GAIN1
VGA State
Pixel b
G2
GAIN0
VGA State
Pixel a
G1
1
1
0
PGA Gain
Source
PGASRC
Offset DAC
Sign
ODSIGN
1
1
1
Test Modes
0
0
0
0
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