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參數(shù)資料
| 型號： | LM80CIMT-31 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Serial Interface ACPI-Compatible Microprocessor System Hardware Monitor |
| 中文描述： | 串行接口ACPI的兼容微處理器系統(tǒng)硬件監(jiān)視器 |
| 文件頁數(shù)： | 24/29頁 |
| 文件大?。?/td> | 435K |
| 代理商： | LM80CIMT-31 |
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Functional Description
(Continued)
12.4 Interrupt Status Register 1— Address 01h
Power on default
<
7:0
>
= 0000 0000 binary
Bit
0
1
2
3
4
5
6
7
Name
IN0
IN1
IN2
IN3
IN4
IN5
IN6
INT_IN
Read/Write
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Description
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A one indicates a High or Low limit has been exceeded.
A zero indicates that a Low has been detected on the INT_IN.
12.5 Interrupt Status Register 2— Address 02h
Power on default
<
7:0
>
= 0000 0000 binary
Bit
0
Name
Read/Write
Read Only
Description
Hot Temperature
A one indicates a High or Low limit has been exceeded. Only “One-Time Interrupt”
and “Default Interrupt” modes are supported. The mode is set by bit-6 of the
Interrupt Mask Register 2.
A one indicates that an interrupt has occurred from the Board Temperature
Interrupt (BTI) input pin. BTI can be tied to the OS output of multiple LM75 chips.
A one indicates that a fan count limit has been exceeded.
A one indicates that a fan count limit has been exceeded.
A one indicates CI (Chassis Intrusion) has gone high.
1
BTI
Read Only
2
3
4
FAN1
FAN2
CI (Chassis
Intrusion)
OS bit
Read Only
Read Only
Read Only
5
Read Only
A one indicates a High or a Low OS Temperature limit has been exceed. Only
comparator mode is supported. Only “One-Time Interrupt” and “Default Interrupt”
modes are supported. The mode is set by bit-7 of the Interrupt Mask Register 2.
6
7
Reserved
Reserved
Read Only
Read Only
12.6 Interrupt Mask Register 1— Address 03h
Power on default
<
7:0
>
= 0000 0000 binary
Bit
Name
Read/
Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Description
0
1
2
3
4
5
6
7
IN0
IN1
IN2
IN3
IN4
IN5
IN6
INT_IN
A one disables the corresponding interrupt status bit for INT interrupt.
A one disables the corresponding interrupt status bit for INT interrupt.
A one disables the corresponding interrupt status bit for INT interrupt.
A one disables the corresponding interrupt status bit for INT interrupt.
A one disables the corresponding interrupt status bit for INT interrupt.
A one disables the corresponding interrupt status bit for INT interrupt.
A one disables the corresponding interrupt status bit for INT interrupt.
A one disables the corresponding interrupt status bit for INT interrupt.
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