參數(shù)資料
型號(hào): LM12434CIWM
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: Sign Data Acquisition System with Serial I/O and Self-Calibration
中文描述: SPECIALTY ANALOG CIRCUIT, PDSO28
封裝: SOP-28
文件頁(yè)數(shù): 12/80頁(yè)
文件大?。?/td> 1561K
代理商: LM12434CIWM
2.0 Electrical Specifications
(Continued)
2.3 DIGITAL SWITCHING CHARACTERISTICS
The following specifications apply to the LM12434 and LM12
à
L
ó
438 for V
A
a
e
V
D
a e
5V
à
3.3V
ó
, AGND
e
DGND
e
0V, C
L
(load capacitance) on output lines
e
80 pF unless otherwise specified.
Boldface limits apply for T
A
e
T
J
e
T
MIN
to T
MAX
,
all other limits for T
A
e
T
J
e
25
§
C. (Notes 6, 7, and 9) (Continued)
2.3.3 TMS320 Interface Mode
Symbol
Parameter
Conditions
Typical
(Note 10)
Limits
(Note 11)
Units
(Limit)
(SeeFigure Below)
t
22
SCLK (Serial Clock) Period
125
à
167
ó
ns (min)
t
23
FSX Set-Up Time to SCLK High
30
à
50
ó
ns (min)
t
24
FSX Hold Time from SCLK High
10
ns (min)
t
25
Data in (DX) Set-Up
Time to SCLK Low
0
ns (min)
t
26
Data in DX Hold Time from
SCLK Low
30
à
120
ó
ns (min)
t
27
FSR High from SCLK High
80
à
100
ó
ns (max)
t
28
FSR Low from SCLK Low
120
ns (max)
t
29
SCLK High to Data
Out (DR) Change
90
ns (max)
TL/H/11879–23
12
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