參數(shù)資料
型號: LFX1200B-03F900I
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: FPGA
英文描述: The ispXPGA architecture
中文描述: FPGA, 3844 CLBS, 1250000 GATES, PBGA900
封裝: FPBGA-900
文件頁數(shù): 17/89頁
文件大小: 941K
代理商: LFX1200B-03F900I
Lattice Semiconductor
ispXPGA Family Data Sheet
17
Table 5. ispXPGA Supported I/O Standards
Table 6. Differential Interface Standard Support
1
sysIO Standard
V
CCO
3.3V
V
REF
N/A
V
TT
LVTTL
N/A
LVCMOS-3.3
3.3V
N/A
N/A
LVCMOS-2.5
2.5V
N/A
N/A
LVCMOS-1.8
1.8V
N/A
N/A
PCI
3.3V
N/A
N/A
AGP-1X
3.3V
N/A
N/A
SSTL3, Class I, II
3.3V
1.5V
1.5V
SSTL2, Class I, II
2.5V
1.25V
1.25V
HSTL, Class I
1.5V
0.75V
0.75V
HSTL, Class III
1.5V
0.9V
1.5V
GTL+
N/A
1.0V
1.5V
LVPECL
3.3V
N/A
N/A
LVDS
1
2.5V
N/A
N/A
BLVDS
2.5V
N/A
N/A
1. V
CCO
must be 2.5V for high speed serial operations (sysHSI block).
sysIO Buffer Not Using sysHSI Block
sysIO Buffer Using sysHSI Block
LVDS
Driver
Supported with external resistor network
Supported
Receiver
Supported with standard termination
Supported with standard termination
BLVDS
Driver
Supported with external resistor network
Not supported
Receiver
Supported (may need termination)
Supported (may need termination)
LVPECL
Driver
Supported with external resistor network
Not supported
Receiver
Supported with termination
Supported with termination
1. For more information, refer to Lattice technical note TN1000,
sysIO Usage Guidelines,
available at www.latticesemi.com.
相關(guān)PDF資料
PDF描述
LFX1200B-04F900C The ispXPGA architecture
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LFX125B-4F900C The ispXPGA architecture
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