參數(shù)資料
型號: LF3370QC12
廠商: LOGIC DEVICES INC
元件分類: 消費(fèi)家電
英文描述: High-Definition Video Format Converter
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: PLASTIC, QFP-160
文件頁數(shù): 6/24頁
文件大?。?/td> 412K
代理商: LF3370QC12
LF3370
High-Definition Video Format Converter
6
03/13/2001–LDS.3370-F
Video Imaging Products
DEVICES INCORPORATED
LF3370’s core. Data may be presented on
input ports A
12-0
, B
12-0
, and C
12-0
as three
channels of non-interleaved input data, one
channel non-interleaved and one channel
interleaved input data, or one channel of
interleaved data (see Table 1 for various
video input schemes). D
12-0
is the Key
channel input port; the Key channel is
simply passed through the input
demultiplexer with a latency that matches
the other three channels.
If video data is non-interleaved and
presented to input ports A
12-0
, B
12-0
, and
C
12-0
, no demultiplexing is performed.
The three channels are passed unmodified
into the LF3370 core with a delay of 3 CLK
cycles. For this operation, bits 0 and 1
must both be set to 1 in Configuration
Register 0 (see Table 5).
If video data is on two channels (see Figure
4), one channel of non-interleaved video
and one channel of interleaved video, it is
assumed that non-interleaved video is
presented to input port A
12-0
(i.e., Luma)
F
IGURE
4. I
NPUT
P
ROCESSING
4:2:2:4 (I
NTERLEAVED
C
HROMA
ON
C
HANNEL
B)
CLK
1
2
3
Demultiplexed Input Data (Output of Demux Section)
A
12-0
5
6
7
8
10
13
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
9
11
SYNC
Y
7
Y
8
Y
9
A'
12-0**
C'
12-0**
D'
12-0**
B'
12-0**
4
12
14
D
12-0
Y
10
Y
11
Y
12
17
15
16
*
B
12-0
CB
0
CR
0
CB
2
CR
2
CB
4
CR
4
CB
6
CR
6
CB
8
CR
8
CB
10
CR
10
CB
12
K
0
K
1
K
2
K
3
K
4
K
5
K
6
K
7
K
8
K
9
K
10
K
11
K
12
CR'
0
CR'
2
CR'
4
CR'
6
CB'
0
CB'
2
CB'
4
CB'
6
Y'
0
Y'
1
Y'
2
Y'
3
Y'
4
Y'
5
Y'
6
Y'
7
Y'
8
K'
0
K'
1
K'
2
K'
3
K'
4
K'
5
K'
6
K'
7
K'
8
CR'
6
CB'
6
RESET
F
IGURE
5. I
NPUT
P
ROCESSING
4:2:2:4 (I
NTERLEAVED
L
UMA
/C
HROMA
ON
C
HANNEL
A)
CLK
RESET
1
2
3
Core Clock (Internally Generated and Synchronized to CLK by RESET) Used Only When Single Channel Interleaved Input or Output Video is Used.
Demultiplexed Input Data (Output of Demux Section)
A
12-0
5
6
7
8
10
13
CB
0
Y
0
CR
0
Y
1
CB
2
Y
2
CR
2
9
11
CLK/2*
SYNC
Y
3
CB
4
Y
4
A’
12-0**
C’
12-0**
CR’
0
D’
12-0**
B’
12-0**
CB’
0
4
12
14
D
12-0
K
0
K
1
K
2
K
3
K
4
Y’
0
Y’
1
Y’
2
K’
0
K’
1
K’
2
CR’
1
CB’
1
K
5
Y’
3
K’
3
CR
4
Y
5
CB
6
17
15
16
18
*
**
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