- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄377624 > LF3370QC12 (LOGIC DEVICES INC) High-Definition Video Format Converter PDF資料下載
參數(shù)資料
| 型號(hào)： | LF3370QC12 |
| 廠商： | LOGIC DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | High-Definition Video Format Converter |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 16/24頁 |
| 文件大?。?/td> | 412K |
| 代理商： | LF3370QC12 |
LF3370
High-Definition Video Format Converter
16
03/13/2001–LDS.3370-F
Video Imaging Products
DEVICES INCORPORATED
BITS
FUNCTION
DESCRIPTION
12-0
Channel ‘A’ Blanking Word
Channel ‘A’ Blanking Level Word
programmed to double the length [(de-
sired length x 2) – 2)] to properly align
data due to the core running at half the
CLK rate.
First Operation Select
‘First Operation Select’ is a bypassing
option where you select to use the first
functional block (Half-Band Filter or
Matrix Multiplier/Key Scaler) in any given
arrangement. If the device was arranged in
such a way that the Half-Band Filter section
fed the Matrix Multiplier/Key Scaler section
and ‘First Operation Select’ was enabled,
the Half-Band Filter section will be used
and the Matrix Multiplier/Key Scaler
section will be bypassed.
If the device was arranged in such a way
that the Matrix Multiplier/Key Scaler
section fed the Half-Band Filter section
and ‘First Operation Select’ was enabled,
the Matrix Multiplier/Key Scaler section
will be used - its output will be routed
directly to the output LUT section. Unlike
in other bypassing options , the total
pipeline latency of the LF3370 is reduced
by the appropriate delay. If the Half-Band
Filter section was bypassed by this method,
the overall pipeline latency should be
reduced by 35 CLK cycles. If the Matrix
Multiplier section was bypassed by this
method, the overall pipeline latency
should be reduced by 6 CLK cycles. This
function is implemented by configuring bit
9 of Configuration Register 0. The ‘Func-
tional Arrangement’ of the device is
determined by configuring bit 4 of Con-
figuration Register 0.
T
ABLE
12.
C
ONFIGURATION
R
EGISTER
12 – A
DDRESS
207
BITS
FUNCTION
DESCRIPTION
12-0
Channel ‘B’ Blanking Word
Channel ‘B’ Blanking Level Word
T
ABLE
13.
C
ONFIGURATION
R
EGISTER
13– A
DDRESS
208
BITS
FUNCTION
DESCRIPTION
12-0
Channel ‘C’ Blanking Word
Channel ‘C’ Blanking Level Word
T
ABLE
14.
C
ONFIGURATION
R
EGISTER
14 – A
DDRESS
209
BITS
FUNCTION
DESCRIPTION
12-0
Channel ‘D’ Blanking Word
Channel ‘D’ Blanking Level Word
T
ABLE
15.
C
ONFIGURATION
R
EGISTER
15 – A
DDRESS
20A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LF3370 | High-Definition Video Format Converter(高清晰度視頻格式轉(zhuǎn)換器) |
| LF39J8 | DIODE ZENER TRIPLE ISOLATED 200mW 8.2Vz 20mA-Izt 0.05 3uA-Ir 6.5 SOT-363 3K/REEL |
| LF43881JC40 | 8 x 8-bit Digital Filter |
| LF43881 | 8 x 8-bit Digital Filter |
| LF48212QC20 | 12 x 12-bit Alpha Mixer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LF33AB | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Very low drop voltage regulators with inhibit |
| LF33ABDT | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LF33ABDT-TR | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LF33ABP | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| LF33ABPT | 功能描述:低壓差穩(wěn)壓器 - LDO 3.3V 0.5A Positive RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動(dòng)電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。