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參數(shù)資料
| 型號： | LC5511D |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | POWER FACTOR CONTROLLER, 18 kHz SWITCHING FREQ-MAX, DIP7 |
| 封裝： | DIP-8/7 |
| 文件頁數(shù)： | 26/40頁 |
| 文件大小： | 888K |
| 代理商： | LC5511D |
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32
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
28106.02
Overcurrent Protection (OCP)
The Overcurrent Protection (OCP) feature monitors the power
MOSFET drain current on a cycle-by-cycle basis, in order to limit
output power. The drain current is detected by a current sensing
resistor, ROCP, and the voltage across it, VROCP, is fed through R3
to the OCP pin to be sensed by it. When it reaches the Overcur-
rent Detection Threshold Voltage, VOCP, the power MOSFET
turns off.
=–
VROCP
|VOCP | + R3
|IOCP |
(5)
Where VOCP = 0.60 V and IOCP = 40 μA.
In order to minimize effects of variation in the internal resis-
tor, R3 (figure 43) is recommended to have a value from 100 to
330 Ω. and C5 is recommended to have a value from 100 to
470 pF, with good temperature characteristics. Selecting larger
capacitances slows OCP response, and results in an increase in the
drain current peak at transient conditions, such as start-up.
Because the OCP function is designed for peak current detection,
there is a chance that it will react to the surge current at the power
MOSFET turn-on edge. In order to avoid this, the Leading Edge
Blanking Time is set. The Leading Edge Blanking Time, tBW =
500 ns, is set.
The surge current pulse width must be less than tBW as shown in
figure 44. In case its width is longer than that, try these measures:
adjust the turn-on point to the VDS bottom point
reduce the voltage resonant capacitor CV (C3 in figure 43)
capacitance
reduce the secondary diode snubber capacitor capacitance
With the quasi-resonant converter, the drain current peak at the
same output load condition becomes different at various AC input
voltage, that is, the higher the AC input voltage is, the lower the
drain current peak is. This means that the converter, at the output
current limiting point at a high AC input, shifts to a higher level
than at a lower AC input voltage, at the same drain peak current
limiting point (OCP point), as shown in figure 45. Therefore, for
the wide AC input voltage design (85 to 265 VAC), if the dif-
ference of the output current limiting point must be minimized,
between low AC input voltage and the high AC input voltage, the
circuit enclosed by dotted line (DX1, DZX1, RX1) in figure 46 helps
to do so. For more details as to how to set it, refer to the next sec-
tion, Input Compensation Function for Overcurrent Protection.
Drain Surge Current
t BW
V
S/GND
OCP
Figure 43. Minus detection OCP circuit
Figure 44. OCP pin voltage
Figure 45. Input compensation OCP circuit: (A) IOUT without input
compensation; (B) IOUT with appropriate input compensation; (C) with
inappropriately set input compensation, more than enough amount of
compensation, IOUT cannot meet target
AC Input Voltage (V)
A
C
B
85
265
Output
Current,
I
OUT
(A)
IOUT target output level
+
-
8(1)
1(2)
3(5)
V
Rocp
Logic
Controller Chip
Drive
OCP
Comparator
0.6V
C5
R3
C3
P
C2
D/ST
S/GND
OCP
Reg
Filter
LC55xxD (LC55xxF)
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