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參數(shù)資料
| 型號： | LC5511D |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | POWER FACTOR CONTROLLER, 18 kHz SWITCHING FREQ-MAX, DIP7 |
| 封裝： | DIP-8/7 |
| 文件頁數(shù)： | 17/40頁 |
| 文件大?。?/td> | 888K |
| 代理商： | LC5511D |
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24
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
28106.02
The formula below is used to calculate R4:
R4 =
R3 ( VCC – VOCPPK – 2Vf )
VOCPPK
(3)
given R3 = 220 Ω, VOCPPK = 1.5 V, VCC = 16 V, and the Vf of
D6 and D7 = 0.8 V. R4 is approximately 1.89 kΩ, and the next
standard resistor value, E12, is 1.8 kΩ.
If the valid period is not satisfied, increase R3 or decrease R4, in
order to raise VOCPPK. Alternatively, increasing the capacitance of
resonant capacitor C3 is also effective because it widens the free
oscillation period. However, it causes an additional switching loss
increase; therefore, ensure the IC temperature rise is acceptable.
Figure 31 shows two different OCP pin waveforms, comparing
transformer coupling conditions between the primary and second-
ary winding. The poor coupling tends to happen in a low output
voltage (small number of LEDs) transformer design with high
NP / NS turns ratio (NP and NS indicate the number of turns of the
primary winding and secondary winding, respectively), and it
results in high leakage inductance. The poor coupling causes high
surge voltage ringing at the power MOSFET drain pin when it
turns off. That high surge voltage ringing is coupled to the auxil-
iary winding and then the inappropriate quasi-resonant signal, as
in figure 31B, is created. The OCP pin has a blanking period of
tBW = 500 ns to avoid reacting to it, but if the surge voltage con-
tinues longer than that period, the IC responds to it and repeat-
edly turns the power MOSFET on and off at high frequency.
This results in an increase of the MOSFET power dissipation and
temperature, and it can be damaged.
If this phenomenon is observed, countermeasures include:
Place C5 as close to the OCP and S/GND pins as possible
Separate the loop trace between the OCP pin and the S/GND
pin from any high current trace
Loosen the transformer coupling between the auxiliary winding
and primary winding
Reinforce the clamping snubber circuit to reduce the surge
voltage
Note: When monitoring the OCP pin voltage, clamp the GND
clip of the probe near the S/GND pin for proper readings.
Timing adjustment of the bottom-on is done by selecting the value
of C7 (figure 29). To do so, observe the power MOSFET drain
voltage, VDS, the drain current, ID, and the quasi-resonant signal.
Then optimize the C7 value to adjust the delay time of tONDLY so
that the MOSFET turns on at the bottom point of VDS.
Figure 31. OCP pin waveform of a poorly coupled transformer
(A) Proper OCP Voltage, Erev2
= 2.6 V
VOCP(OVP)
VBD(TH1)= 0.24 V
VBD(TH2) = 0.17 V
S/GND
OCP pin blanking
time, tBW = 500 ns
(B) Inappropriate OCP Voltage, Erev2
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| LC5512B-10F484C | 功能描述:CPLD - 復(fù)雜可編程邏輯器件 Use ispMACH 4000B RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100 |
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