參數(shù)資料
型號: LAN9116
廠商: SMSC Corporation
英文描述: Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
中文描述: 高效的單芯片10/100非PCI以太網(wǎng)控制器
文件頁數(shù): 68/126頁
文件大?。?/td> 831K
代理商: LAN9116
Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Revision 1.1 (05-17-05)
68
SMSC LAN9116
DATASHEET
5.3.1
ID_REV—Chip ID and Revision
This register contains the ID and Revision fields for this design.
9Ch
FREE_RUN
Free Run Counter
-
A0h
RX_DROP
RX Dropped Frames Counter
00000000h
A4h
MAC_CSR_CMD
MAC CSR Synchronizer Command (MAC
CSR’s are indexed through this register)
00000000h
A8h
MAC_CSR_DATA
MAC CSR Synchronizer Data
00000000h
ACh
AFC_CFG
Automatic Flow Control Configuration
00000000h
B0h
E2P_CMD
EEPROM command (The EEPROM is
indexed through this register)
00000000h
B4h
E2P_DATA
EEPROM Data
00000000h
B8h - FCh
RESERVED
Reserved for future use
-
Offset:
50h
Size:
32 bits
BITS
DESCRIPTION
TYPE
DEFAULT
31-16
Chip ID.
This read-only field identifies this design
RO
0116h
15-0
Chip Revision.
This is the current revision of the chip.
RO
0001h
Table 5.1 LAN9116 Direct Address Register Map (continued)
CONTROL AND STATUS REGISTERS
BASE ADDRESS
+ OFFSET
SYMBOL
REGISTER NAME
DEFAULT
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