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參數(shù)資料
| 型號(hào)： | LAN8187_06 |
| 廠商： | SMSC Corporation |
| 英文描述： | 【15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWRTM |
| 中文描述： | 【15kV的ESD保護(hù)信息產(chǎn)業(yè)部/ RMII快速以太網(wǎng)PHY與HP Auto - MDIX功能和SMSC flexPWRTM |
| 文件頁數(shù)： | 29/72頁 |
| 文件大?。?/td> | 433K |
| 代理商： | LAN8187_06 |
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±15kV ESD Protected MII/RMII Fast-Ethernet PHY with HP Auto-MDIX and SMSC flexPWR
TM
Datasheet
Revision 1.0 (12-14-06)
29
SMSC LAN8187/LAN8187I
DATASHEET
4.7.1
Parallel Detection
If the LAN8187/LAN8187I is connected to a device lacking the ability to auto-negotiate (i.e. no FLPs
are detected), it is able to determine the speed of the link based on either 100M MLT-3 symbols or
10M Normal Link Pulses. In this case the link is presumed to be Half Duplex per the IEEE standard.
This ability is known as “Parallel Detection.” This feature ensures interoperability with legacy link
partners. If a link is formed via parallel detection, then bit 0 in register 6 is cleared to indicate that the
Link Partner is not capable of auto-negotiation. The controller has access to this information via the
management interface. If a fault occurs during parallel detection, bit 4 of register 6 is set.
Register 5 is used to store the Link Partner Ability information, which is coded in the received FLPs.
If the Link Partner is not auto-negotiation capable, then register 5 is updated after completion of parallel
detection to reflect the speed capability of the Link Partner.
4.7.2
Re-starting Auto-negotiation
Auto-negotiation can be re-started at any time by setting register 0, bit 9. Auto-negotiation will also re-
start if the link is broken at any time. A broken link is caused by signal loss. This may occur because
of a cable break, or because of an interruption in the signal transmitted by the Link Partner. Auto-
negotiation resumes in an attempt to determine the new link configuration.
If the management entity re-starts Auto-negotiation by writing to bit 9 of the control register, the
LAN8187/LAN8187I will respond by stopping all transmission/receiving operations. Once the
break_link_timer is done, in the Auto-negotiation state-machine (approximately 1200ms) the auto-
negotiation will re-start. The Link Partner will have also dropped the link due to lack of a received
signal, so it too will resume auto-negotiation.
4.7.3
Disabling Auto-negotiation
Auto-negotiation can be disabled by setting register 0, bit 12 to zero. The device will then force its
speed of operation to reflect the information in register 0, bit 13 (speed) and register 0, bit 8 (duplex).
The speed and duplex bits in register 0 should be ignored when auto-negotiation is enabled.
4.7.4
Half vs. Full Duplex
Half Duplex operation relies on the CSMA/CD (Carrier Sense Multiple Access / Collision Detect)
protocol to handle network traffic and collisions. In this mode, the carrier sense signal, CRS, responds
to both transmit and receive activity. In this mode, If data is received while the PHY is transmitting,
a collision results.
In Full Duplex mode, the PHY is able to transmit and receive data simultaneously. In this mode, CRS
responds only to receive activity. The CSMA/CD protocol does not apply and collision detection is
disabled.
4.8
HP Auto-MDIX
HP Auto-MDIX facilitates the use of CAT-3 (10 Base-T) or CAT-5 (100 Base-T) media UTP interconnect
cable without consideration of interface wiring scheme. If a user plugs in either a direct connect LAN
cable, or a cross-over patch cable, as shown in
Figure 4.4 on page 31
, the SMSC LAN8187/LAN8187I
Auto-MDIX PHY is capable of configuring the TXP/TXN and RXP/RXN pins for correct transceiver
operation.
The internal logic of the device detects the TX and RX pins of the connecting device. Since the RX
and TX line pairs are interchangeable, special PCB design considerations are needed to accommodate
the symmetrical magnetics and termination of an Auto-MDIX design.
The Auto-MDIX function can be disabled through an internal register 27, or the external control pins
AMDIX_EN. When disabled the TX and RX pins can be configured with the Channel Select
(CH_SELECT) pin as desired. The table below shows how the control pins and the register are used
to configure the Auto-MDIX function.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LAN8187I | 制造商:SMSC 制造商全稱:SMSC 功能描述:High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX |
| LAN8187I-JT | 功能描述:以太網(wǎng) IC HiPerfrm Ethrnt PHY RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| LAN8187-JT | 功能描述:以太網(wǎng) IC HiPerfrm Ethrnt PHY RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| LAN83C171 | 制造商:SMSC 制造商全稱:SMSC 功能描述:EPIC/XF ACPI/PC 97 Compliant Integrated PCI 10/100 Mbps Fast Ethernet Controller |
| LAN83C171 WAF | 制造商:SMSC 功能描述: |
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