參數(shù)資料
型號(hào): L6732
廠商: 意法半導(dǎo)體
英文描述: Adjustable step-down controller with synchronous rectification
中文描述: 可調(diào)式降壓同步整流控制器
文件頁(yè)數(shù): 12/33頁(yè)
文件大小: 735K
代理商: L6732
Device description
L6732
12/33
5.3
Bypassing the LDO to avoid the voltage drop with low Vcc
If V
CC
5V the internal LDO works in dropout with an output resistance of about 1
. The
maximum LDO output current is about 100mA and so the output voltage drop is 100mV, to
avoid this the LDO can be bypassed.
5.4
Internal and external references
It is possible to set the internal/external reference and the switching frequency by setting the
proper voltage at the EAREF pin. The maximum value of the external reference depends on the
V
CC
: with V
CC
= 4V the clamp operates at about 2V (typ.), while with V
CC
greater than 5V the
maximum external reference is 2.5V (typ.).
V
EAREF
from 0% to 80% of V
CCDR
-> External reference/Fsw=250KHz
V
EAREF
from 80% to 95% of V
CCDR
-> V
REF
= 0.6V/Fsw=500KHz
V
EAREF
from 95% to 100% of V
CCDR
-> V
REF
= 0.6V/Fsw=250KHz
Providing an external reference from 0V to 450mV the output voltage will be regulated but
some restrictions must be considered:
The minimum OVP threshold is set at 300mV;
The under-voltage-protection doesn't work;
The PGOOD signal remains low;
To set the resistor divider it must be considered that a 100K pull-down resistor is integrated into
the device (see
Figure 5.
). Finally it must be taken into account that the voltage at the EAREF
pin is captured by the device at the start-up when V
CC
is about 4V.
Figure 4.
Bypassing the LDO
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