參數(shù)資料
型號(hào)： L6710
廠商： 意法半導(dǎo)體
英文描述： 6 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER WITH DYNAMIC VID MANAGEMENT
中文描述： 6位可編程雙相與動(dòng)態(tài)VID管理控制器
文件頁(yè)數(shù)： 17/34頁(yè)
文件大?。?/td> 1610K
代理商： L6710
17/34
L6710
Figure 9. OVP (left) and UVP (right) latch.
SOFT START, INHIBIT AND POWER DOWN
At start-up a ramp is generated increasing the loop reference from 0V to the final value programmed by
VID in 2048 clock periods as shown in figure 10.
Once the soft start begins, the reference is increased: upper and lower MOS begin to switch and the output
voltage starts to increase with closed loop regulation. At the end of the digital soft start, the Power Good
comparator is enabled and the PGOOD signal is then driven high (See fig. 10). The Under Voltage com-
parator is enabled when the reference voltage reaches 0.6V. The Soft-Start will not take place, if both VCC
and VCCDR pins are not above their own turn-on thresholds.
During normal operation, if any under-voltage is detected on one of the two supplies the device shuts
down. Forcing the OUTEN pin to a voltage lower than 0.4V (Typ.) disables the device: all the power mos-
fets and protections are turned off until the condition is removed.
Figure 10. Soft Start
LGATEx
OSC/FAULT
OUTEN
REF_OUT
LGATEx
OSC/FAULT
OUTEN
REF_OUT
V
CC
=V
CCDR
V
LGATEx
PGOOD
V
OUT
t
t
t
t
Turn ON threshold
2048 Clock Cycles
Timing Diagram
Acquisition:
CH1=PGOOD; CH2=REF_OUT;
CH3=VOUT; CH4=LGATEx)
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