參數(shù)資料
型號： L6566BTR
廠商： STMICROELECTRONICS
元件分類： 穩(wěn)壓器
英文描述： 0.8 A POWER FACTOR CONTROLLER, 900 kHz SWITCHING FREQ-MAX, PDSO16
封裝： LEAD FREE, SOP-16
文件頁數(shù)： 29/51頁
文件大?。?/td> 624K
代理商： L6566BTR
L6566B
Application information
35/51
5.11
OVP block
The OVP function of the L6566B monitors the voltage on the ZCD pin (11) in MOSFET’s
OFF-time, during which the voltage generated by the auxiliary winding tracks converter’s
output voltage. If the voltage on the pin exceeds an internal 5 V reference, a comparator is
triggered, an overvoltage condition is assumed and the device is shut down. An internal
current generator is activated that sources 1 mA out of the VFF pin (15). If the VFF voltage
is allowed to reach 2 Vbe over 5 V, the L6566B will be latched off. See Section 5.9: Latched
for more details on IC’s behavior under these conditions. If the
impedance externally connected to pin 15 is so low that the 5+2 VBE threshold cannot be
reached or if some means is provided to prevent that, the device will be able to restart after
the Vcc has dropped below 5 V. Refer to the “Application examples and Ideas” section
(Table7 on page45) for additional hints.
Figure 22.
OVP function: internal block diagram
The ZCD pin will be connected to the auxiliary winding through a resistor divider RZ1, RZ2
(see Figure 8 on page 20). The divider ratio kOVP = RZ2 / (RZ1 + RZ2) will be chosen equal
to:
Equation 13
where VoutOVP is the output voltage value that is to activate the protection, Ns the turn
number of the secondary winding and Naux the turn number of the auxiliary winding.
Fault
2-bit
counter
R Q1
S
Monostable
M1
STROBE
OVP
COUT
2s
0.5s
Monostable
M2
-
+
5 V
ZCD
Counter
reset
FF
40kΩ
5pF
PWM latch
Q
S
R
11
to triggering
block
L6566B
Naux
Ns
Vout
5
k
OVP
OVP =
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