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參數(shù)資料
| 型號： | L6566BTR |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.8 A POWER FACTOR CONTROLLER, 900 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | LEAD FREE, SOP-16 |
| 文件頁數(shù)： | 24/51頁 |
| 文件大?。?/td> | 624K |
| 代理商： | L6566BTR |
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Application information
L6566B
30/51
Equation 8
where Lp is the inductance of the primary winding. In case a constant maximum power
capability vs. the input voltage is not required, the VFF pin can be grounded, directly or
through a resistor (see Section 5.11: OVP block on page 35), hence fixing the overcurrent
setpoint at 1 V, or biased at a fixed voltage through a divider from VREF to get a lower
setpoint.
It is possible to bypass the pin to ground with a small film capacitor (e.g. 1-10 nF) to ensure
a clean operation of the IC even in a noisy environment.
The pin is internally forced to ground during UVLO, after activating any latched protection
and when pin COMP is pulled below its low clamp voltage (see Section 5.5: PWM control
5.7
Hiccup-mode OCP
A third comparator senses the voltage on the current sense input and shuts down the device
if the voltage on the pin exceeds 1.5 V, a level well above that of the maximum overcurrent
setpoint (1 V). Such an anomalous condition is typically generated by either a short circuit of
the secondary rectifier or a shorted secondary winding or a hard-saturated flyback
transformer.
Figure 18.
Hiccup-mode OCP: timing diagram
To distinguish an actual malfunction from a disturbance (e.g. induced during ESD tests), the
first time the comparator is tripped the protection circuit enters a “warning state”. If in the
next switching cycle the comparator is not tripped, a temporary disturbance is assumed and
the protection logic will be reset in its idle state; if the comparator will be tripped again a real
malfunction is assumed and the L6566B will be stopped. Depending on the time relationship
Lp
Rs
Td
3
k
opt =
Vcc
(pin 5)
GD
(pin 4)
OCP latch
VccON
VccOFF
Vccrestart
Secondary diode is shorted here
t
VCS
(pin 7)
Vcc_OK
t
1.5 V
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