L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101) 51
GPIO[49, 48, 46, 45, 43, 42]
Dedicated GPIO
Bidirectional
These are the dedicated general-purpose I/O signals. By
default, these signals oat after reset. Note that for
LSI Logic manufacturing test purposes, GPIO46 must be
pulled HIGH during reset.
Programming the General-Purpose Pins
To use a general-purpose pin, enable the entire group by writing to the
General-Purpose Mode register; then select the input/output for each pin
within the group by writing to the specic General-Purpose Control
register. (Note that no group has more than 16 general-purpose pins.)
After each pin is dened, the programmer can read the value of the
GPIO signal using the General-Purpose Data registers, or write the value
of a GPIO signal to the General-Purpose Data registers.
Latency of GPIO Updates
The use of the GPIO pins is intended for controlling/monitoring external
logic by the software.
You should consider a delay between the time when the software writes
a value to a general-purpose output pin and the time the value is valid
on the output pin. This delay is caused by the transaction time between
the on-chip processor to the on-chip peripheral component, and the
delay time of the general-purpose module.
The delay that the general-purpose module inserts in writing to an output
general-purpose pin is not more than 1
s (for SCLK = 27 MHz).
Table 12
Group 7: Dedicated GPIO Signals
Pin Name
GPIO Signal
GPIO[43:42]
GPIO[46:45]
GPIO[49:48]
118bds Page 51 Wednesday, February 3, 1999 12:37 PM