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參數(shù)資料
| 型號： | L6280 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | THREE CHANNELS MULTIPOWER DRIVER SYSTEM |
| 中文描述： | 三通道移動電站驅(qū)動系統(tǒng) |
| 文件頁數(shù)： | 8/26頁 |
| 文件大小： | 388K |
| 代理商： | L6280 |
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SYSTEM DESCRIPTION
(Refer to the Block Dia-
gram)
The L6280 is a single chip power microsystem
which includes drives for three differentloads, the
associated control logic and a Switched Mode
PowerSupply(SMPS) at V
SS
= 5V
±
5%.
The IC can be directly connected to a standard
microprocessor because of its common I/O inter-
face architecture. The L6280 can exchange infor-
mation regarding the load driver and the control
methodvia a 8 bit data bus. The block named mi-
croprocessor interface decodes the first four bits
(A0....A3), which, depending on the content of the
remaining four (D0.......D3) are used to enable the
power DMOS, to activate the PWM loop, and fi-
nally to set theD/A output value.
The power stage can be divided into 3 channels.
Channels1 and 2 have 6 DMOS transistors each
one (2high side drivers with R
dson
=1
, 4 low side
drivers with R
dson
=2
). Depending on the appli-
cation load, these driver transistors can be con-
nected in different ways. The microprocessor, via
software, must activate the proper control loop to
optimize operation of different loads and output
stage configurations. Because of this program-
mability in the control of the output configurations,
a large variety of different loads can be driven by
the same integrated circuit (see possible configu-
ration for power stage on Figure 5) giving the
greater system flexibility. Current levels up to 1A
are possible from CH1 and CH2, limited primarily
by the power dissipation of the IC.
The third channel has a fixed configuration in-
tended to drive a solenoid. DMOS transistorswith
0.5
R
dson
are used to provide 4A max load ca-
pability.
All three channels have 3 bit current D/A resolu-
tion. Some auxiliary blocks of diagnostic and pro-
tection(e.g.: The power Fail/Reset andthe watch-
dog) are provided to protect the system from
microprocessorfailure or power fail.
Figure7:
SMPSBlock Diagram
Step Down Switchmode Power Supply
(See
Figure 7).
The step down switchmode power supply con-
tains a DMOS power stage with 1
R
dson
(Q1),
control circuitry, diagnostics and protection cir-
cuits; a regulated voltage (V
SSout)
is used to drive
some of the internal circuit blocks and the exter-
nal microprocessor and memories. Thanks to the
DMOS output stage this regulator can deliver a
continuousoutput power of 4W (5V; 0.8A) with an
efficiency betler than 90% at a typical frequency
of 80kHz.
The regulation loop uses a classical pulse width
modulation circuit that includes a sawtooth gener-
ator, an error amplifier, a voltagecomparatorand a
PWM latch. A precision 5V reference is generated
and trimmed on chip to guarantee a 5% tolerance.
This referenceis used as voltage reference for the
SMPSand the referencefor the DACs.
The IC also provides an extra voltage (V
S
+V
DHS
)
for the correct driving of the high side drivers.
These transistors require a gate voltage higher
than the supply voltage Vs to obtainthe minimum
ON resistance. Because of the v ery low current
needed to drive DMOS transistors, this auxiliary
voltage is easily obtained from a second winding
on the inductor of the LC output network (see Ap-
plicationInformation).
An overcurrent protection circuit is included to
turn OFF the power transistor when a current
level of 1.2A is exceeded.
The SMPS block also includes a voltage sensing
circuit to generatea power ON reset signal for the
microprocessor. This Power Fail circuit senses
the input supply voltage and the output regulated
voltage and sets the Reset-out pin to the high
voltage only when both the sensed voltages are
correct.
Finally, the SMPS block is able to deliver f
OSC/2
used in the actuation stage for the PWM control
of the current (CH1; CH2 and CH3).
L6280
8/26
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