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參數(shù)資料
| 型號(hào)： | L6280 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | THREE CHANNELS MULTIPOWER DRIVER SYSTEM |
| 中文描述： | 三通道移動(dòng)電站驅(qū)動(dòng)系統(tǒng) |
| 文件頁數(shù)： | 14/26頁 |
| 文件大小： | 388K |
| 代理商： | L6280 |
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In full bridge configuration D0 to D3 set the driv-
ing strategy of the bridge:
D0
X
X
X
X
X
X
X
X
D1
0
0
0
0
1
1
1
1
D2
0
0
1
1
0
0
1
1
D3
0
1
0
1
0
1
0
1
Tristate leftand right
Chopper left, brake right
Chopper right, brake left
Brake left, brake right
Tristate leftand right
Diagonalchopper
Inverted diagonalchopper
Tristate leftand right
c)
Dual Half Bridge Configuration
D0
X
X
X
X
X
X
X
X
D1
0
0
0
0
1
1
1
1
D2
0
0
1
1
0
0
1
1
D3
0
1
0
1
0
1
0
1
Tristate leftand right
Brake right, chopper left
Brake right, chopper right
Brake left, brake right
Chopper left, chopper right
Tristate left, chopper right
Tristate right, chopper left
Tristate leftand right
CHANNEL 3
For channel 3 only D0 has a meaning: it directly
drives the low side driver DMOS. When D0 = 0
the low side driver DMOS is switched OFF and
the current flows through external recirculation di-
odes.
A0 A1
1
0When A0, A1 are in this configuration,D0
to D3are used to setthe strategy of the
output power stages according to the out-
put stageconfiguration previouslyselected.
A1 A0
1
0When A0, A1 are in this configuration,
D0 to D2 areloaded into left or rightwind-
ing D/A converter, according to D3 value
(only for channel 1 and 2)
D3
0
LeftchannelDAC
1
Rightchannel DAC
For channel 3, D0 to D2 are loaded into the
uniqueDAC.
A1 A0
1 1 When A0, A1 are in thisconfiguration,the
value of D0 to D3 causesan incrementor
a decrementof the content of left/right
DAC of a channel.The inc/dec operation
and the DAC register selection (right or
left) are selected according to the following
truth table:
D3
D2
D1
D0
dec LEFT
inc LEFT
dec RIGHT
inc RIGHT
The change in DAC registers is done immediately
after receiving the data.The configurationsD3, D2
= 11 and D1, D0 = 11 are not allowed. (Them can
cause faulty operations) Channel 3 has only one
DAC; the change in its value is done according to
D0,D1 value.
D1
D0
dec DAC
inc DAC
D1, D0 = 11 is not allowed (they can cause faulty
operations).
Output Operation
In full bridge and dual half bridge configurations,
the output stages will operate according to D1,
D2,D3 values.
FULL BRIDGE CONFIGURATION (CH1 and
CH2)
In full bridge configuration the cennection be-
tween the output of the high side drivers and the
corresponding low side drivers has to be made
with external jumpers. The output stage diagram
here below (Fig. 13) must be substituted inside
the blank boxes in the followingblock diagrams.
L6280
14/26
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