參數(shù)資料
型號: KSZ8893FQL
廠商: Micrel Inc
文件頁數(shù): 50/117頁
文件大?。?/td> 0K
描述: IC SWITCH FAST ETH 3PORT 128PQFP
標(biāo)準(zhǔn)包裝: 66
控制器類型: 以太網(wǎng)開關(guān)控制器
接口: MII,RMII,SNI
電源電壓: 3.1 V ~ 3.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-PQFP(14x20)
包裝: 托盤
配用: 576-1603-ND - EVAL KIT EXPERIMENTAL KSZ8893MQL
其它名稱: 576-1565
Micrel, Inc.
KSZ8893FQL
October 2007
38
M9999-101607-1.3
skipped and carrier sense is generated immediately, thereby reducing the chance of further collisions and carrier sense
is maintained to prevent packet reception.
To ensure no packet loss in 10 Base-T or 100 Base-TX half duplex modes, the user must enable the following:
1. Aggressive back-off (register 3 (0x03), bit [0])
2. No excessive collision drop (register 4 (0x04), bit [3])
Note: These bits are not set as defaults, as this is not the IEEE standard.
Broadcast Storm Protection
The KSZ8893FQL has an intelligent option to protect the switch system from receiving too many broadcast packets. As
the broadcast packets are forwarded to all ports except the source port, an excessive number of switch resources
(bandwidth and available space in transmit queues) may be utilized. The KSZ8893FQL has the option to include
“multicast packets” for storm control. The broadcast storm rate parameters are programmed globally, and can be
enabled or disabled on a per port basis. The rate is based upon a 67ms interval for 100BT and a 500ms interval for
10BT. At the beginning of each interval, the counter is cleared to zero, and the rate limit mechanism starts to count the
number of bytes during the interval. The rate definition is described in register 6 (0x06) and 7 (0x07). The default setting
is 0x63 (99 decimal). This is equal to a rate of 1%, calculated as follows:
148,800 frames/sec * 67ms/interval * 1% = 99 frames/interval (approx.) = 0x63
Note: 148,800 frames/sec is based on 64-byte block of packets in 100Base-TX with 12 bytes of IPG and 8 bytes of
preamble between two packets.
MII Interface Operation
The Media Independent Interface (MII) is specified in Clause 22 of the IEEE 802.3u Standard. It provides a common
interface between physical layer and MAC layer devices. The MII provided by the KSZ8893FQL is connected to the
device’s third MAC. The interface contains two distinct groups of signals: one for transmission and the other for
reception. The following table describes the signals used by the MII bus.
PHY-Mode Connections
MAC-Mode Connections
External MAC
Controller Signals
KSZ8893FQL
PHY Signals
Pin
Descriptions
External
PHY Signals
KSZ8893FQL
MAC Signals
MTXEN
SMTXEN
Transmit enable
MTXEN
SMRXDV
MTXER
SMTXER
Transmit error
MTXER
(not used)
MTXD3
SMTXD[3]
Transmit data bit 3
MTXD3
SMRXD[3]
MTXD2
SMTXD[2]
Transmit data bit 2
MTXD2
SMRXD[2]
MTXD1
SMTXD[1]
Transmit data bit 1
MTXD1
SMRXD[1]
MTXD0
SMTXD[0]
Transmit data bit 0
MTXD0
SMRXD[0]
MTXC
SMTXC
Transmit clock
MTXC
SMRXC
MCOL
SCOL
Collision detection
MCOL
SCOL
MCRS
SCRS
Carrier sense
MCRS
SCRS
MRXDV
SMRXDV
Receive data valid
MRXDV
SMTXEN
MRXER
(not used)
Receive error
MRXER
SMTXER
MRXD3
SMRXD[3]
Receive data bit 3
MRXD3
SMTXD[3]
MRXD2
SMRXD[2]
Receive data bit 2
MRXD2
SMTXD[2]
MRXD1
SMRXD[1]
Receive data bit 1
MRXD1
SMTXD[1]
MRXD0
SMRXD[0]
Receive data bit 0
MRXD0
SMTXD[0]
MRXC
SMRXC
Receive clock
MRXC
SMTXC
Table 8. MII Signals
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