參數(shù)資料
型號(hào): KSZ8873MLL
廠商: Micrel Inc
文件頁(yè)數(shù): 23/115頁(yè)
文件大小: 0K
描述: IC ETHERNET SWITCH 3PORT 64-LQFP
產(chǎn)品培訓(xùn)模塊: KSZ8873 Ethernet Switches
特色產(chǎn)品: KSZ8873 Ethernet Switch Controller
標(biāo)準(zhǔn)包裝: 160
控制器類(lèi)型: 以太網(wǎng)開(kāi)關(guān)控制器
接口: MII
電源電壓: 1.8V,2.5V,3.3V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 64-LQFP
供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 1081 (CN2011-ZH PDF)
其它名稱(chēng): 576-3459
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Micrel, Inc.
KSZ8873MLL/FLL/RLL
September 20, 2013
15
Revision 1.6
Pin Description and I/O Assignment (Continued)
Pin Number
Pin Name
Type
(1)
Description
35
SCOL3/
NC
Ipu/O
MLL/FLL: Switch MII collision detect
RLL: No connection, Internal pull up.
36
SMRXC3/
NC
I/O
MLL/FLL: Switch MII receive clock.
Output in PHY MII mode
Input in MAC MII mode
RLL: No Connection.
37
GND
Gnd
Digital ground
38
VDDC
P
1.8V digital core power input from VDDCO (Pin 56).
39
SPIQ
lpu/O
SPI slave mode: serial data output
Note: an external pull-up is needed on this pin when it is in use.
Strap option: XCLK Frequency Selection
PU = 25 MHz
PD = 50 MHz
40
SPISN
Ipu
SPI slave mode: chip select (active low)
When SPISN is high, the KSZ8873MLL/FLL/RLL is deselected and SPIQ is held in
high impedance state.
A high-to-low transition is used to initiate SPI data transfer.
Note: an external pull-up is needed on this pin when it is in use.
41
INTRN
Opu
Interrupt
Active Low signal to host CPU to indicate an interrupt status bit is set when lost
link. Refer to Register 187 and 188.
42
SCL_MDC
I/O
SPI slave mode / I
2
C slave mode: clock input
I
2C master mode: clock output
MIIM clock input
43
SDA_MDIO
Ipu/O
SPI slave mode: serial data input
I
2C master/slave mode: serial data input/output
MIIM: data input/out
Note: an external pull-up is needed on this pin when it is in use.
44
NC
Unused pin, only this NC pin can be pulled down by a pull-down resistor for better
EMI.
45
P1ANEN
Ipu/O
PU = enable auto-negotiation on port 1
PD = disable auto-negotiation on port 1
46
P1SPD
Ipu/O
PU = force port 1 to 100BT if P1ANEN = 0
PD = force port 1 to 10BT if P1ANEN = 0
47
P1DPX
Ipu/O
PU = port 1 default to full duplex mode if P1ANEN = 1 and auto- negotiation fails.
Force port 1 in full-duplex mode if P1ANEN = 0.
PD = port 1 default to half duplex mode if P1ANEN = 1 and auto- negotiation fails.
Force port 1 in half duplex mode if P1ANEN = 0.
48
GND
Digital ground
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