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      參數(shù)資料
      型號: KSZ8873FLL
      廠商: Micrel Inc
      文件頁數(shù): 44/115頁
      文件大?。?/td> 0K
      描述: IC ETHERNET SW 3PORT 64LQFP
      產(chǎn)品培訓(xùn)模塊: KSZ8873 Ethernet Switches
      特色產(chǎn)品: KSZ8873 Ethernet Switch Controller
      標(biāo)準(zhǔn)包裝: 160
      控制器類型: 以太網(wǎng)開關(guān)控制器
      接口: MII
      電源電壓: 1.8V,2.5V,3.3V
      工作溫度: 0°C ~ 70°C
      安裝類型: 表面貼裝
      封裝/外殼: 64-LQFP
      供應(yīng)商設(shè)備封裝: 64-LQFP(10x10)
      包裝: 托盤
      其它名稱: 576-3631
      KSZ8873FLL-ND
      Micrel, Inc.
      KSZ8873MLL/FLL/RLL
      September 20, 2013
      34
      Revision 1.6
      The KSZ8873RLL filters error frames, and thus does not implement the RX_ER output signal. To detect error frames from
      RMII PHY devices, the SMTXER3 input signal of the KSZ8873RLL is connected to the RXER output signal of the RMII
      PHY device.
      Collision detection is implemented in accordance with the RMII Specification.
      In RMII mode, tie MII signals, SMTXD3[3:2] and SMTXER3, to ground if they are not used.
      The KSZ8873RLL RMII can interface with RMII PHY and RMII MAC devices. The latter allows two KSZ8873RLL devices
      to be connected back-to-back. Table 7 shows the KSZ8873RLL RMII pin connections with an external RMII PHY and an
      external RMII MAC, such as another KSZ8873RLL device.
      Table 7. RMII Signal Connections
      KSZ8873RLL PHY-MAC Connections
      KSZ8873RLL MAC-MAC
      Connections
      External PHY Signals
      KSZ8873RLL
      MAC Signals
      Pin Descriptions
      KSZ8873RLL
      MAC Signals
      External
      MAC Signals
      REF_CLK
      REFCLKI_3
      Reference Clock
      REFCLKI_3
      REF_CLK
      TX_EN
      SMRXDV3
      Carrier sense/
      Receive data valid
      SMRXDV3
      CRS_DV
      TXD1
      SMRXD31
      Receive data bit 1
      SMRXD31
      RXD1
      TXD0
      SMRXD30
      Receive data bit 0
      SMRXD30
      RXD0
      CRS_DV
      SMTXEN3
      Transmit enable
      SMTXEN3
      TX_EN
      RXD1
      SMTXD31
      Transmit data bit 1
      SMTXD31
      TXD1
      RXD0
      SMTXD30
      Transmit data bit 0
      SMTXD30
      TXD0
      RX_ER
      SMTXER3
      Receive error
      (not used)
      MII Management (MIIM) Interface
      The KSZ8873MLL/FLL/RLL supports the IEEE 802.3 MII Management Interface, also known as the Management Data
      Input/Output (MDIO) Interface. This interface allows upper-layer devices to monitor and control the states of the
      KSZ8873MLL/FLL/RLL. An external device with MDC/MDIO capability is used to read the PHY status or configure the
      PHY settings. Further detail on the MIIM interface is found in Clause 22.2.4.5 of the IEEE 802.3u Specification and refer
      to 802.3 section 22.3.4 for the timing.
      The MIIM interface consists of the following:
      A physical connection that incorporates the data line (SDA_MDIO) and the clock line (SCL_MDC).
      A specific protocol that operates across the aforementioned physical connection that allows an external controller to
      communicate with the KSZ8873MLL/FLL/RLL device.
      Access to a set of eight 16-bit registers, consisting of six standard MIIM registers [0:5] and two custom MIIM registers
      [29, 31].
      The MIIM Interface can operate up to a maximum clock speed of 5MHz.
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      相關(guān)代理商/技術(shù)參數(shù)
      參數(shù)描述
      KSZ8873FLL-EVAL 功能描述:以太網(wǎng)開發(fā)工具 3-Port Fast Ethernet Switch with 2x FX Ports - Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評估:KSZ8873RLL 接口類型:RMII 工作電源電壓:
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      KSZ8873MLL AM TR 功能描述:以太網(wǎng) IC 3-Port 10/100 Ethernet Switch with 1x MII Interface (Automotive Grade, Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray