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| 型號： | KM4132G271BTQ(R)-8 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL |
| 中文描述： | 128K的x 32位× 2銀行同步圖形RAM的LVTTL |
| 文件頁數(shù)： | 50/51頁 |
| 文件大小： | 1033K |
| 代理商： | KM4132G271BTQ(R)-8 |
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KM4132G271B
CMOS SGRAM
- 50
Rev. 2.4 (May 1998)
1. All entries assume that CKE was active(High) during the preceding clock cycle and the current clock cycle.
2. Illegal to bank in specified state ; Function may be legal in the bank indicated by BA, depending on the state of that bank.
3. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
4. NOP to bank precharging or in idle state. May precharge bank indicated by BA(and PA).
5. Illegal if any banks is not idle.
6. Legal only if all banks are in idle or row active state.
RA = Row Address(A
0
~A
9
)
NOP = No Operation Command
BA = Bank Address(A
10
)
CA = Column Address(A
0
~A
7
)
PA = Precharge All(A
9
)
AP = Auto Precharge(A
9
)
FUNCTION TRUTH TABLE for CKE(TABLE 2)
Current
State
CKE
n-1
CKE
n
CS
RAS
CAS
WE
DSF
ADDR
ACTION
NOTE
Self
Refresh
H
X
X
X
X
X
X
X
INVALID
Exit Self Refresh --> ABI after
t
RC
Exit Self Refresh --> ABI after
t
RC
ILLEGAL
ILLEGAL
ILLEGAL
L
L
L
L
L
H
H
H
H
H
H
L
L
L
L
X
H
H
H
L
X
H
H
L
X
X
H
L
X
X
X
X
X
X
X
X
X
X
X
X
7
7
L
H
L
L
L
X
H
H
X
X
H
L
X
X
X
H
X
X
X
H
X
X
X
H
X
X
X
X
X
X
X
X
NOP(Maintain Self Refresh)
INVALID
Exit Power Down --> ABI
Exit Power Down --> ABI
Both
Bank
Precharge
Power
Down
8
8
L
L
L
L
H
H
H
L
L
L
L
X
H
H
L
X
H
L
X
X
L
X
X
X
X
X
X
X
X
X
X
X
ILLEGAL
ILLEGAL
ILLEGAL
NOP(Maintain Power Down Mode)
All
Banks
Idle
H
H
H
H
H
L
L
L
X
H
L
L
X
X
H
H
X
X
H
H
X
X
H
L
X
X
X
X
X
X
X
X
Refer to Table 1
Enter Power Down
Enter Power Down
ILLEGAL
9
9
H
H
H
H
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
X
H
H
L
X
L
L
L
X
ILLEGAL
Row (& Bank) Active
Enter Self Refresh
Mode Register Access
RA
X
9
OP Code
H
L
H
H
L
L
H
L
L
X
X
X
L
X
X
X
L
X
X
X
L
X
X
X
H
X
X
X
OP Code
X
X
X
Special Mode Register Access
NOP
Refer to Operations in Table 1
Begin Clock Suspend next cycle
Any State
other than
Listed
Above
10
L
L
H
L
X
X
X
X
X
X
X
X
X
X
X
X
Exit Clock Suspend next cycle
Maintain clock Suspend
10
7. After CKE
′
s low to high transition to exist self refresh mode. And a time of
t
RC
(min) has to be elapse after CKE
′
s low to high
transition to issue a new command.
8. CKE low to high transition is asynchronous as if restarts internal clock.
A minimum setup time "
t
SS
+ one clock" must be satisfied before any command other than exit.
9. Power-down and self refresh can be entered only from the all banks idle state.
10. Must be a legal command.
FUNCTION TRUTH TABLE (TABLE 1, Continued)
ABBREVIATIONS
*Note :
ABBREVIATIONS : ABI = All Banks Idle
*Note :
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| KM4132G271BTQR-8 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128K x 32bit x 2 Banks Synchronous Graphic RAM LVTTL |
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