參數(shù)資料
型號: K5A3240YT
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM
中文描述: 多芯片封裝存儲(chǔ)器32兆位(4Mx8/2Mx16)雙銀行NOR閃存/分(512Kx8/256Kx16)全CMOS SRAM的
文件頁數(shù): 33/45頁
文件大?。?/td> 867K
代理商: K5A3240YT
MCP MEMORY
K5A3x40YT(B)C
Revision 0.0
November 2002
- 39 -
Preliminary
RESET Timing Diagram
Flash SWITCHING WAVEFORMS
Parameter
Symbol
70ns
80ns
Unit
Min
Max
Min
Max
RESET Pulse Width
tRP
500
-
500
-
ns
RESET Low to Valid Data
(During Internal Routine)
tREADY
-
20
-
20
s
RESET Low to Valid Data
(Not during Internal Routine)
tREADY
-
500
-
500
ns
RESET High Time Before Read
tRH
50
-
50
-
ns
RY/BY Recovery Time
tRB
0
-
0
-
ns
RESET High to Address Valid
tRSTW
200
-
200
-
ns
RESET Low Set-up Time
tRSTS
500
-
500
-
ns
RESET
tRP
Power-up and RESET Timing Diagram
CEF or OE
RY/BY
tREADY
tRB
RESET
CEF or OE
RY/BY
tRH
tREADY
tRP
Reset Timings NOT during Internal Routine
Reset Timings during Internal Routine
High
RESET
tAA
VccF
Address
DATA
tRSTS
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