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參數(shù)資料
| 型號(hào)： | K5A3240YT |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Multi-Chip Package MEMORY 32M Bit (4Mx8/2Mx16) Dual Bank NOR Flash Memory / 4M(512Kx8/256Kx16) Full CMOS SRAM |
| 中文描述： | 多芯片封裝存儲(chǔ)器32兆位（4Mx8/2Mx16）雙銀行NOR閃存/分（512Kx8/256Kx16）全CMOS SRAM的 |
| 文件頁(yè)數(shù)： | 26/45頁(yè) |
| 文件大?。?/td> | 867K |
| 代理商： | K5A3240YT |
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MCP MEMORY
K5A3x40YT(B)C
Revision 0.0
November 2002
- 32 -
Preliminary
Alternate WE Controlled Program Operations
Flash SWITCHING WAVEFORMS
NOTES: 1. DQ7 is the output of the complement of the data written to the device.
2. DOUT is the output of the data written to the device.
3. PA : Program Address, PD : Program Data
4. The illustration shows the last two cycles of the program command sequence.
OE
Address
tCS
CEF
DATA
WE
tAH
tOH
tDF
tAS
tRC
tOE
tCE
tDS
tDH
tWP
tOES
tPGM
Status
DOUT
555H
PA
A0H
Data Polling
tCH
PD
tWPH
RY/BY
tBUSY
tRB
tWC
Parameter
Symbol
70ns
80ns
Unit
Min
Max
Min
Max
Write Cycle Time
tWC
70
-
80
-
ns
Address Setup Time
tAS
0
-
0
-
ns
Address Hold Time
tAH
45
-
45
-
ns
Data Setup Time
tDS
35
-
35
-
ns
Data Hold Time
tDH
0
-
0
-
ns
CEF Setup Time
tCS
0
-
0
-
ns
CEF Hold Time
tCH
0
-
0
-
ns
OE Setup Time
tOES
0
-
0
-
ns
Write Pulse Width
tWP
35
-
35
-
ns
Write Pulse Width High
tWPH
25
-
25
-
ns
Programming Operation
Word
tPGM
14(typ.)
us
Byte
9(typ.)
us
Accelerated Programming Operation
Word
tACCPGM
9(typ.)
s
Byte
7(typ.)
s
Read Cycle Time
tRC
70
-
80
-
ns
Chip Enable Access Time
tCE
-
70
-
80
ns
Output Enable Time
tOE
-
25
-
25
ns
CEF & OE Disable Time
tDF
-
16
-
16
ns
Output Hold Time from Address, CEF or OE
tOH
0
-
0
-
ns
Program/Erase Valide to RY/BY Delay
tBUSY
90
-
90
-
ns
Recovery Time from RY/BY
tRB
0
-
0
-
ns
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