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參數(shù)資料
| 型號(hào)： | K4M64163PK-BE900 |
| 元件分類： | DRAM |
| 英文描述： | 4M X 16 SYNCHRONOUS DRAM, 7 ns, PBGA54 |
| 封裝： | LEAD FREE, FBGA-54 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 114K |
| 代理商： | K4M64163PK-BE900 |
K4M64163PK - R(B)E/G/C/F
October 2005
11
Mobile-SDRAM
1. In order to save power consumption, Mobile SDRAM has PASR option.
2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full Array, 1/2 of Full Array and 1/4 of Full Array.
BA1=0
- Full Array
- 1/2 Array
- 1/4 Array
Partial Self Refresh Area
BA0=0
BA1=0
BA0=0
BA1=0
BA0=1
BA1=1
BA0=1
BA1=1
BA0=0
BA1=1
BA0=1
BA1=1
BA0=0
BA1=0
BA0=1
BA1=0
BA0=0
BA1=0
BA0=1
BA1=1
BA0=1
BA1=1
BA0=0
Partial Array Self Refresh
Note :
1. In order to save power consumption, Mobile-SDRAM includes the internal temperature sensor and control units to control the
self refresh cycle automatically according to the two temperature range ; 45
°C and 85 °C(for Extended), 70 °C(for Commercial)
2. If the EMRS for external TCSR is issued by the controller, this EMRS code for TCSR is ignored.
3. It has +/-5
°C tolerance.
Temperature Range
Self Refresh Current (IDD6)
Unit
- E / C
- G / F
Full Array
1/2 Array
1/4 Array
Full Array
1/2 Array
1/4 Array
45
°C*3
140
130
125
90
80
75
uA
85/70
°C
220
190
175
180
150
135
Internal Temperature Compensated Self Refresh (TCSR)
B. POWER UP SEQUENCE
1. Apply power and attempt to maintain CKE at a high state and all other inputs may be undefined.
- Apply VDD before or at the same time as VDDQ.
2. Maintain stable power, stable clock and NOP input condition for a minimum of 200us.
3. Issue precharge commands for all banks of the devices.
4. Issue 2 or more auto-refresh commands.
5. Issue a mode register set command to initialize the mode register.
6. Issue a extended mode register set command to define DS or PASR operating type of the device after normal MRS.
For operating with DS or PASR , set DS or PASR mode in EMRS setting stage.
In order to adjust another mode in the state of DS or PASR mode, additional EMRS set is required but power up sequence is not
needed again at this time. In that case, all banks have to be in idle state prior to adjusting EMRS set.
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相關(guān)代理商/技術(shù)參數(shù) |
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| K4M64163PK-BF1L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
| K4M64163PK-BF75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
| K4M64163PK-BF90 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
| K4M64163PK-BG1L | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
| K4M64163PK-BG75 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA |
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