參數(shù)資料
型號: K4M64163PK-BE900
元件分類: DRAM
英文描述: 4M X 16 SYNCHRONOUS DRAM, 7 ns, PBGA54
封裝: LEAD FREE, FBGA-54
文件頁數(shù): 2/12頁
文件大?。?/td> 114K
代理商: K4M64163PK-BE900
K4M64163PK - R(B)E/G/C/F
October 2005
10
Mobile-SDRAM
Register Programmed with Extended MRS
Address
BA1
BA0
A11 ~ A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
Function
Mode Select
RFU
DS
0
0
PASR
Normal MRS Mode
Test Mode
CAS Latency
Burst Type
Burst Length
A8
A7
Type
A6
A5
A4
Latency
A3
Type
A2
A1
A0
BT=0
BT=1
0
Mode Register Set
0
Reserved
0
Sequential
0
1
0
1
Reserved
0
1
1
1
Interleave
0
1
2
1
0
Reserved
0
1
0
2
Mode Select
0
1
0
4
1
Reserved
0
1
3
BA1 BA0
Mode
0
1
8
Write Burst Length
1
0
Reserved
0
Setting
for Nor-
mal MRS
1
0
Reserved
A9
Length
1
0
1
Reserved
1
0
1
Reserved
0
Burst
1
0
Reserved
1
0
Reserved
1
Single Bit
1
Reserved
1
Full Page
Reserved
Register Programmed with Normal MRS
Address
BA0 ~ BA1*1
A11 ~ A10/AP
A9*2
A8
A7
A6
A5
A4
A3
A2
A1
A0
Function
"0" Setting for Normal
MRS
RFU
W.B.L
Test Mode
CAS Latency
BT
Burst Length
A. MODE REGISTER FIELD TABLE TO PROGRAM MODES
Full Page Length x16 : 64Mb(256), 128Mb(512),256Mb(512),512Mb(1024)
NOTES:
1.RFU(Reserved for future use) should stay "0" during MRS cycle.
2.If A9 is high during MRS cycle, "Burst Read Single Bit Write" function will be enabled.
Mode Select
Driver Strength
PASR
BA1
BA0
Mode
A6
A5
Driver Strength
A2
A1
A0
Size of Refreshed Array
0
Normal MRS
0
Full
0
Full Array
0
1
Reserved
0
1
1/2
0
1
1/2 of Full Array
1
0
EMRS for Mobile SDRAM
1
0
1/4
0
1
0
1/4 of Full Array
1
Reserved
1
1/8
0
1
Reserved
Reserved Address
1
0
Reserved
A11~A10/AP
A9
A8
A7
A4
A3
1
0
1
Reserved
0
1
0
Reserved
1
Reserved
EMRS for PASR(Partial Array Self Ref.) & DS(Driver Strength)
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