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參數(shù)資料
| 型號： | ITF87012SVT |
| 廠商： | INTERSIL CORP |
| 元件分類： | 功率晶體管 |
| 英文描述： | 6A, 20V, 0.035 Ohm, N-Channel,2.5V Specified Power MOSFET(6A, 20V, 0.035Ω N溝道2.5V專用功率MOS場效應管) |
| 中文描述： | 6 A, 20 V, 0.038 ohm, N-CHANNEL, Si, POWER, MOSFET, MO-193AA |
| 封裝： | PLASTIC, TSOP-6 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 180K |
| 代理商： | ITF87012SVT |
6
Thermal Resistance vs Mounting Pad Area
The maximum rated junction temperature, T
JM
, and the thermal
resistance of the heat dissipating path determines the maximum
allowable device power dissipation, P
DM
, in an application.
Therefore the application’s ambient temperature, T
A
(
o
C), and
thermal resistance R
θ
JA
(
o
C/W) must be reviewed to ensure
that T
JM
is never exceeded. Equation 1 mathematically
represents the relationship and serves as the basis for
establishing the rating of the part.
In using surface mount devices such as the TSOP-6
package, the environment in which it is applied will have a
significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of P
DM
is
complex and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. Fornonsteadystateapplications,thepulsewidth,theduty
cycle and the transient thermal response of the part, the
board and the environment they are in.
Intersil provides thermal information to assist the designer’s
preliminary application evaluation. Figure 20 defines the
R
θ
JA
for the device as a function of the top copper
(component side) area. This is for a horizontally positioned
FR-4 board with 1oz copper after 1000 seconds of steady
state power with no air flow. This graph provides the
Test Circuits and Waveforms
FIGURE 16. GATE CHARGE TEST CIRCUIT
FIGURE 17. GATE CHARGE WAVEFORMS
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. SWITCHING TIME WAVEFORM
R
L
V
GS
+
-
V
DS
V
DD
DUT
I
g(REF)
V
DD
Q
g(TH)
Q
gs
V
GS
= 0.5V
Q
g(2)
V
GS
= 2V
Q
g(TOT)
V
GS
= 4.5V
V
DS
V
GS
I
g(REF)
0
0
Q
gd
V
GS
0V
R
GS
R
L
DUT
+
-
V
GS
V
DS
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
(EQ. 1)
PDM
θ
JA
–
(
------------------------------
)
=
ITF87012SVT
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