- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄9227 > ISPPAC-CLK5308S-01TN48C (Lattice Semiconductor Corporation)IC BUFFER FANOUT 8OUTPUT 48TQFP PDF資料下載
參數(shù)資料
| 型號： | ISPPAC-CLK5308S-01TN48C |
| 廠商： | Lattice Semiconductor Corporation |
| 文件頁數(shù)： | 24/56頁 |
| 文件大小： | 0K |
| 描述： | IC BUFFER FANOUT 8OUTPUT 48TQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | ispClock™ |
| 類型： | 時鐘發(fā)生器，扇出配送，零延遲緩沖器 |
| PLL： | 帶旁路 |
| 輸入： | HSTL，LVCMOS，LVDS，LVPECL，LVTTL，SSTL |
| 輸出： | eHSTL，HSTL，LVCMOS，LVTTL，SSTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:8 |
| 差分 - 輸入:輸出： | 是/無 |
| 頻率 - 最大： | 267MHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-TQFP（7x7） |
| 包裝： | 托盤 |
| 其它名稱： | 220-1000 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁當(dāng)前第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁
Lattice Semiconductor
ispClock5300S Family Data Sheet
30
ispClock5300 Operating Conguration Summary
The following table summarizes the operating modes of the ispClock5300S.
Note:
Whenever the input buffer is congured as differential input, the fan-out buffer paths become unavailable.
Non-zero delay buffer for differential clock input is realized by using the PLL_BYPASS signal set to logical
‘1’.
Output Skew control mechanism is available only to clock outputs sourced from PLL VCO.
Table 3. ispClock5300S Operating Modes
Thermal Management
In applications where a majority of the ispClock5300S’s outputs are active and operating at or near maximum out-
put frequency, package thermal limitations may need to be considered to ensure a successful design. Thermal
characteristics of the packages employed by Lattice Semiconductor may be found in the document Thermal Man-
agement which may be obtained at www.latticesemi.com.
The maximum current consumption of the digital and analog core circuitry for ispClock5312S is 150mA worst case
(ICCD + ICCA), and each of the output banks may draw up to 16mA worst case (LVCMOS 3.60V, CL=5pF, fOUT=100
MHz, both outputs in each bank enabled). This results in a total device dissipation:
PDMAX = 3.60V x (6 x 16mA + 150mA) = 0.88W
(3)
With a maximum recommended operating junction temperature (TJOP) of 130°C for an industrial grade device, the
maximum allowable ambient temperature (TAMAX) can be estimated as
TAMAX = TJOP - PDMAX x ΘJA = 130°C - 0.88W x 48°C/W = 85°C
(4)
where ΘJA = 48°C/W for the 48 TQFP package in still air and ΘJA = 42°C/W for the 64 TQFP package in still air.
The above analysis represents the worst-case scenario. Signicant improvement in maximum ambient operating
temperature can be realized with additional cooling. Providing a 200 LFM (Linear Feet per Minute) airow reduces
ΘJA to 44°C/W for the 48 TQFP package.
While it is possible to perform detailed calculations to estimate the maximum ambient operating temperature from
operating conditions, some simpler rule-of-thumb guidance can also be obtained through the derating curves
shown in Figure 25 which shows the maximum ambient operating temperature permitted when operating a given
number of output banks at the maximum output frequency.
ispClock5300S
Operating Mode
Reference Input Clocks
Skew Control
Output Clock
Frequency Divider
Zero Delay Buffer Mode
Single Ended / Differential
Yes
Mixed Zero-Delay &
Non-Zero Delay Buffer Mode
Single Ended Only
Only to Zero Delay
Output Clocks
Only to Zero Delay
Output Clocks
Non-Zero Delay Fan-out Buffer
Mode 1
Single Ended Only
No
Non-Zero Delay Fan-out Buffer
Mode 2
Single Ended / Differential
No
Only to Clocks Sourced From
Bypassed PLL
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADF4360-8BCPZRL7 | IC SYNTHESIZER VCO 24-LFCSP |
| VI-2TW-MW | CONVERTER MOD DC/DC 5.5V 100W |
| ADF4360-9BCPZRL7 | IC SYNTHESIZER W/ADJ VCO 24LFCSP |
| X9317WV8Z-2.7T1 | IC XDCP SGL 100TAP 10K 8-TSSOP |
| X9317WM8Z-2.7T1 | IC XDCP SGL 100TAP 10K 8-MSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPPACCLK5308S-01TN48C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended |
| ispPAC-CLK5308S-01TN48I | 功能描述:時鐘驅(qū)動器及分配 ISP 0 Delay Unv Fan- Out Buf-Sngl End I RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| ISPPACCLK5308S-01TN48I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended |
| ISPPACCLK5308S-01TN64C | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended |
| ISPPACCLK5308S-01TN64I | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。