參數(shù)資料
型號： ISP1301
廠商： NXP Semiconductors N.V.
英文描述： Universal Serial Bus On-The-Go transceiver
中文描述： 通用串行總線在- The - Go的收發(fā)器
文件頁數(shù)： 35/46頁
文件大?。?/td> 245K
代理商： ISP1301
Philips Semiconductors
ISP1301
USB OTG transceiver
Product data
Rev. 01 — 14 April 2004
35 of 46
9397 750 11355
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
17. Dynamic characteristics
Table 48:
V
BAT
=
2.7 V to 4.5 V; V
DD_LGC
=
1.65 V to 3.6 V; T
amb
=
40
°
C to +85
°
C; unless otherwise specified.
Symbol
Parameter
Conditions
Reset
t
W(RESET_N)
pulse width on input RESET_N
Internal clock
f
clk
clock frequency
bit GLOBAL_PWR_DN = 0
Dynamic characteristics: reset and clock
Min
Typ
Max
Unit
10
-
-
μ
s
700
1000
1300
kHz
Table 49:
V
BAT
=
2.7 V to 4.5 V; V
DD_LGC
=
1.65 V to 3.6 V; C
L
=
50 pF; R
PU
=
1.5 k
on DP to V
TERM
; T
amb
=
40
°
C to +85
°
C; unless
otherwise specified.
Symbol
Parameter
Conditions
t
TOI
bus turnaround time
(OE_N/INT_N to DAT/VP and
SE0/VM)
t
TIO
bus turnaround time
(OE_N/INT_N to DAT/VP and
SE0/VM)
Dynamic characteristics: digital I/O pins
Min
0
Typ
-
Max
5
Unit
ns
output-to-input; see
Figure 19
input-to-output; see
Figure 19
0
-
5
ns
Table 50:
V
BAT
=
2.7 V to 4.5 V; V
DD_LGC
=
1.65 V to 3.6 V; C
L
=
50 pF; R
PU
=
1.5 k
on DP to V
TERM
; T
amb
=
40
°
C to +85
°
C; unless
otherwise specified.
Symbol
Parameter
Conditions
Driver characteristics
t
FR
rise time
C
L
=
50 pF to 125 pF;
10 % to 90 % of
|
V
OH
V
OL
|
; see
Figure 15
t
FF
fall time
C
L
=
50 pF to 125 pF;
90 % to 10 % of
|
V
OH
V
OL
|
; see
Figure 15
FRFM
differential rise/fall time
matching (t
FR
/t
FF
)
from idle state
V
CRS
output signal crossover voltage
excluding the first transition
from idle state; see
Figure 16
Driver timing
t
PLH(drv)
driver propagation delay
(DAT/VP, SE0/VM to DP, DM)
Figure 16
and
Figure 20
t
PHL(drv)
driver propagation delay
(DAT/VP, SE0/VM to DP, DM)
Figure 16
and
Figure 20
t
PHZ
driver disable delay
(OE_N/INT_N to DP, DM)
Figure 17
and
Figure 21
t
PLZ
driver disable delay
(OE_N/INT_N to DP, DM)
Figure 17
and
Figure 21
t
PZH
driver enable delay
(OE_N/INT_N to DP, DM)
Figure 17
and
Figure 21
Dynamic characteristics: analog I/O pins DP and DM
Min
Typ
Max
Unit
4
-
20
ns
4
-
20
ns
excluding the first transition
90
-
111.1
%
[1]
1.3
-
2.0
V
LOW-to-HIGH; see
-
-
18
ns
HIGH-to-LOW; see
-
-
18
ns
HIGH-to-OFF; see
-
-
15
ns
LOW-to-OFF; see
-
-
15
ns
OFF-to-HIGH; see
-
-
15
ns
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