參數(shù)資料
型號： ISP1161
廠商： NXP Semiconductors N.V.
英文描述： Full-speed Universal Serial Bus single-chip host and device controller
中文描述： 全速通用串行總線的單芯片主機和設備控制器
文件頁數(shù)： 77/127頁
文件大?。?/td> 2762K
代理商： ISP1161
Philips Semiconductors
ISP1161
Full-speed USB single-chip host and device controller
Product data
Rev. 01 — 3 July 2001
77 of 130
9397 750 08313
Philips Electronics N.V. 2001. All rights reserved.
Code (Hex): 20 —
read
Code (Hex): A0 —
write
Remark:
1. Bit 0, InterruptPinEnable, is used as pin INT1’s master interrupt enable. This bit
should be used together with the register Hc
μ
PInterruptEnable to enable pin
INT1.
2. Bits 4:3 are fixed at the value 01B for ISP1161.
13.4.2
HcDMAConfiguration Register
Code (Hex): 21 —
read
Code (Hex): A1 —
write
Table 46: HcDMAConfiguration Register: bit allocation
Bit
15
Symbol
Reset
Access
Bit
7
Symbol
reserved
14
13
12
11
10
9
8
reserved
00H
R/W
6
5
4
3
2
1
0
BurstLen[1:0]
DMA
Enable
0
R/W
reserved
DMACount
erSelect
0
R/W
ITL_ATL_
DataSelect
0
R/W
DMARead
WriteSelect
0
R/W
Reset
Access
0
0
0
0
R/W
R/W
R/W
Table 47: HcDMAConfiguration Register: bit description
Bit
Symbol
Description
15 to 8
-
reserved
7
-
reserved
6 to 5
BurstLen[1:0]
00B —
single-cycle burst DMA
01B —
4-cycle burst DMA
10B —
8-cycle burst DMA
11B —
reserved
4
DMAEnable
0 —
DMA is terminated
1 —
DMA is enabled
This bit will be reset to zero when DMA transfer is completed
3
-
reserved
2
DMACounter
Select
1 —
Enables the DMA counter for DMA transfer.
HcTransferCounter register must be filled with non-zero values for
DREQ1 to be raised after bit DMA Enable is set
1
ITL_ATL_
DataSelect
1 —
ATL buffer RAM selected for ATL data
0
DMARead
WriteSelect
1 —
write to ISP1161 HC’s FIFO buffer RAM
0 —
DMA counter not used. External EOT must be used
0 —
ITL buffer RAM selected for ITL data
0 —
read from ISP1161 HC’s FIFO buffer RAM
相關PDF資料
PDF描述
ISP1161A1 Universal Serial Bus single-chip host and device controller
ISP1161A1BD Universal Serial Bus single-chip host and device controller
ISP1161A1BM Universal Serial Bus single-chip host and device controller
ISP1161BD Full-speed Universal Serial Bus single-chip host and device controller
ISP1161BM Full-speed Universal Serial Bus single-chip host and device controller
相關代理商/技術參數(shù)
參數(shù)描述
ISP1161A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Full-speed Universal Serial Bus single-chip host and device controller
ISP1161A1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus single-chip host and device controller
ISP1161A1BD 功能描述:IC USB HOST/DEVICE CTRLR 64-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1161A1BD,118 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161A1BD,151 功能描述:USB 接口集成電路 USB1.1 HOST &DEVICE RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
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