14 FN7575.5 September 5, 2012 does not change the time being read. At the end of a read, the master supplies a stop condition to end" />
參數(shù)資料
型號(hào): ISL12022MAIBZ
廠商: Intersil
文件頁(yè)數(shù): 6/31頁(yè)
文件大?。?/td> 0K
描述: IC RTC/CALENDAR TEMP SNSR 20SOIC
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 38
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào)器,夏令時(shí),閏年,SRAM
存儲(chǔ)容量: 128B
時(shí)間格式: HH:MM:SS(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 2.7 V ~ 5.5 V
電壓 - 電源,電池: 1.8 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 20-SOIC
包裝: 管件
ISL12022MA
14
FN7575.5
September 5, 2012
does not change the time being read. At the end of a read, the
master supplies a stop condition to end the operation and free
the bus. After a read, the address remains at the previous
address +1 so the user can execute a current address read and
continue reading the next register. When the previous address is
2Fh, the next address will wrap around to 00h.
It is not necessary to set the WRTC bit prior to writing into the
control and status, alarm, and user SRAM registers.
TABLE 1. REGISTER MEMORY MAP (YELLOW SHADING INDICATES READ-ONLY BITS)
ADDR.
SECTION
REG
NAME
BIT
RANGE
DEFAULT
7
6
543
210
00h
RTC
SC
0
SC22
SC21
SC20
SC13
SC12
SC11
SC10
0 to 59
00h
01h
MN
0
MN22
MN21
MN20
MN13
MN12
MN11
MN10
0 to 59
00h
02h
HR
MIL
0
HR21
HR20
HR13
HR12
HR11
HR10
0 to 23
00h
03h
DT
0
DT21
DT20
DT13
DT12
DT11
DT10
1 to 31
01h
04h
MO
0
MO20
MO13
MO12
MO11
MO10
1 to 12
01h
05h
YR
YR23
YR22
YR21
YR20
YR13
YR12
YR11
YR10
0 to 99
00h
06h
DW
0
DW2
DW1
DW0
0 to 6
00h
07h
CSR
SR
BUSY
OSCF
DSTADJ
ALM
LVDD
LBAT85
LBAT75
RTCF
N/A
01h
08h
INT
ARST
WRTC
IM
FOBATB
FO3
FO2
FO1
FO0
N/A
01h
09h
PWR_VD
D
CLRTS
D
DDD
VDDTrip2 VDDTrip1 VDDTrip0
N/A
00h
0Ah
PWR_VBA
T
DRESEAL
B
VB85Tp2 VB85Tp1 VB85Tp0 VB75Tp2 VB75Tp1 VB75Tp0
N/A
00h
0Bh
ITRO
IDTR0
1
IDTR00
IATR05
IATR04
IATR03
IATR02
IATR01
IATR00
N/A
XXh
0Ch
ALPHA
D
ALPHA6
ALPHA5
ALPHA4
ALPHA3
ALPHA2
ALPHA1
ALPHA0
N/A
XXh
0Dh
BETA
TSE
BTSE
BTSR
BETA4
BETA3
BETA2
BETA1
BETA0
N/A
XXh
0Eh
FATR
0
FFATR5
FATR4
FATR3
FATR2
FATR1
FATR0
N/A
00h
0Fh
FDTR
0
FDTR4
FDTR3
FDTR2
FDTR1
FDTR0
N/A
00h
10h
ALARM
SCA0
ESCA0 SCA022
SCA021
SCA020
SCA013
SCA012
SCA011
SCA010
00 to 59
00h
11h
MNA0
EMNA
0
MNA022 MNA021
MNA020
MNA013
MNA012
MNA011
MNA010 00 to 59
00h
12h
HRA0
EHRA0
D
HRA021
HRA020
HRA013
HRA012
HRA011
HRA010
0 to 23
00h
13h
DTA0
EDTA0
D
DTA021
DTA020
DTA013
DTA012
DTA011
DTA010
01 to 31
00h
14h
MOA0
EMOA0
0
D
MOA020
MOA013
MOA012
MOA011
MOA010 01 to 12
00h
15h
DWA0
EDWA
0
D
DWA02
DWA01
DWA00
0 to 6
00h
16h
TSV2B
VSC
0
VSC22
VSC21
VSC20
VSC13
VSC12
VSC11
VSC10
0 to 59
00h
17h
VMN
0
VMN22
VMN21
VMN20
VMN13
VMN12
VMN11
VMN10
0 to 59
00h
18h
VHR
VMIL
0
VHR21
VHR20
VHR13
VHR12
VHR11
VHR10
0 to 23
00h
19h
VDT
0
VDT21
VDT20
VDT13
VDT12
VDT11
VDT10
1 to 31
00h
1Ah
VMO
0
VMO20
VMO13
VMO12
VMO11
VMO10
1 to 12
00h
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