參數(shù)資料
型號： IRLR120N
廠商： International Rectifier
英文描述： HEXFET Power MOSFET(HEXFET 功率MOS場效應管)
中文描述： HEXFET功率MOSFET（馬鞍山的HEXFET功率場效應管）
文件頁數(shù)： 2/10頁
文件大?。?/td> 173K
代理商： IRLR120N
IRLR/U120N
2
www.irf.com
Parameter
Min. Typ. Max. Units
100
–––
–––
0.12
–––
––– 0.185
–––
––– 0.225
–––
––– 0.265
1.0
–––
3.1
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
4.0
–––
35
–––
23
–––
22
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 6.0A
V
GS
= 5.0V, I
D
= 6.0A
V
GS
= 4.0V, I
D
= 5.0A
V
DS
= V
GS
, I
D
= 250μA
V
DS
= 25V, I
D
= 6.0A
V
DS
= 100V, V
GS
= 0V
V
DS
= 80V, V
GS
= 0V, T
J
= 150°C
V
GS
= 16V
V
GS
= -16V
I
D
= 6.0A
V
DS
= 80V
V
GS
= 5.0V, See Fig. 6 and 13
V
DD
= 50V
I
D
= 6.0A
R
G
= 11
,
V
GS
= 5.0V
R
D
= 8.2
,
See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
V
GS
= 0V
V
DS
= 25V
= 1.0MHz, See Fig. 5
V
(BR)DSS
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
Drain-to-Source Breakdown Voltage
–––
–––
V
V/°C
W
V
GS(th)
g
fs
Gate Threshold Voltage
Forward Transconductance
2.0
–––
25
250
100
-100
20
4.6
10
–––
–––
–––
–––
V
S
μA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
nA
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
nC
ns
C
iss
C
oss
C
rss
Source-Drain Ratings and Characteristics
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
440
97
50
–––
–––
–––
pF
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
nH
I
GSS
S
D
G
L
S
Internal Source Inductance
–––
7.5
–––
R
DS(on)
Static Drain-to-Source On-Resistance
L
D
Internal Drain Inductance
–––
4.5 –––
I
DSS
Drain-to-Source Leakage Current
S
D
G
Parameter
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 6.0A, V
GS
= 0V
T
J
= 25°C, I
F
=6.0A
di/dt = 100A/μs
I
S
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
–––
–––
I
SM
–––
–––
V
SD
t
rr
Q
rr
t
on
–––
–––
–––
–––
110
410
1.3
160
620
V
ns
nC
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
A
10
35
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
V
DD
= 25V, starting T
J
= 25°C, L = 4.7mH
R
G
= 25
, I
AS
= 6.0A. (See Figure 12)
I
SD
≤
6.0A, di/dt
≤
340A/μs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175°C
** When mounted on 1" square PCB (FR-4 or G-10 Material ) .
For recommended footprint and soldering techniques refer to application note #AN-994
Uses IRL520N data and test conditions.
This is applied for I-PAK, L
S
of D-PAK is measured between lead and
center of die contact
Pulse width
≤
300μs; duty cycle
≤
2%.
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