
www.irf.com
1
8/5/05
IRF6645
DirectFETDirectFET
ISOMETRIC
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SH
SJ
SP
Fig 1.
Typical On-Resistance vs. Gate Voltage
Description
The IRF6645 combines the latest HEXFET Power MOSFET Silicon technology with the advanced DirectFET
TM
packaging to achieve the
lowest on-state resistance in a package that has the footprint of an Micro8 and only 0.7 mm profile. The DirectFET package is compatible with
existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques,
when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided
cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
The IRF6645 is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom applications
(36V - 75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled
with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements,
and makes this device ideal for high performance isolated DC-DC converters.
Absolute Maximum Ratings
Parameter
V
DS
Drain-to-Source Voltage
V
GS
Gate-to-Source Voltage
I
D
@ T
A
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
A
= 70°C
Continuous Drain Current, V
GS
@ 10V
I
D
@ T
C
= 25°C
Continuous Drain Current, V
GS
@ 10V
I
DM
Pulsed Drain Current
E
AS
Single Pulse Avalanche Energy
I
AR
Avalanche Current
RoHs Compliant Containing No Lead and Bromide
Low Profile (<0.7 mm)
Dual Sided Cooling Compatible
Ultra Low Package Inductance
Optimized for High Frequency Switching
Ideal for High Performance Isolated Converter
Primary Switch Socket
Optimized for Synchronous Rectification
Low Conduction Losses
Compatible with existing Surface Mount Techniques
Click on this section to link to the appropriate technical paper.
Click on this section to link to the DirectFET Website.
Surface mounted on 1 in. square Cu board, steady state.
T
C
measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
Starting T
J
= 25°C, L = 5.0mH, R
G
= 25
, I
AS
= 3.4A.
Fig 2.
Typical Total Gate Charge vs. Gate-to-Source Voltage
Units
V
A
mJ
A
29
3.4
Max.
100
4.5
25
45
±20
5.7
4
6
VGS, Gate-to-Source Voltage (V)
8
10
12
14
16
20
30
40
50
60
70
80
T
)
TJ = 25°C
TJ = 125°C
ID = 3.4A
0
4
8
12
16
QG Total Gate Charge (nC)
0
2
4
6
8
10
12
VG
VDS= 80V
VDS= 50V
ID= 3.4A
V
DSS
100V max ±20V max
Q
g tot
V
GS
R
DS(on)
28m
@ 10V
V
gs(th)
Q
gd
14nC
4.8nC
4.0V
MZ
MN