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參數(shù)資料
| 型號： | IDTCV109EPV |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | XO, clock |
| 英文描述： | CMOS/TTL Compatible |
| 中文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | SSOP-48 |
| 文件頁數(shù)： | 20/21頁 |
| 文件大小： | 104K |
| 代理商： | IDTCV109EPV |
COMMERCIAL TEMPERATURE RANGE
20
IDTCV109E
CLOCK GENERATOR FOR DESKTOP PC PLATFORMS
PD# DE-ASSERTION
The time fromthe de-assertion of PD#or until power supply ramps to get stable clocks will be less than 1.8ms. If the drive mode control bit for PD#tristate
is programmed to 1’ the stopped differential pair must first be driven high to a mnimumof 200mV in less than 300μs of PD#deassertion.
P
WRDWN
#
CPU 133MHz
CPU# 133MHz
SRC 100MHz
SRC# 100MHz
USB 48MHz
PCI 33MHz
REF 14.31818
t
STABLE
<1.8mS
t
DRIVE_PWRDWN#
<300
μ
S, <200mV
N PROGRAMMING J ITTER MEASUREMENT
Tested on IDT test board, 10" trace, 10pF loading.
Measured at CPU0, differential active probe.
Data showed may vary due to CMOS process.
100MHz MODE
N =
200h (512)
300h (768)
3FFh (1023)
Output Freq. (MHz)
115
172
229
CPU Jitter (ps)
80
51
65
166MHz MODE
N =
200h (512)
300h (768)
3FFh (1023)
Output Freq. (MHz)
204
305
407
CPU Jitter (ps)
71
72
92
133MHz MODE
N =
200h (512)
300h (768)
3FFh (1023)
Output Freq. (MHz)
153
229
306
CPU Jitter (ps)
76
79
72
200MHz MODE
N =
200h (512)
300h (768)
3FFh (1023)
Output Freq. (MHz)
229
344
458
CPU Jitter (ps)
68
84
82
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDTCV110JP | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| IDTCV110JPV | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| IDTCV110JPVG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| IDTCV110L | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| IDTCV110LPV | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
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