參數(shù)資料
型號： IDT82V3288
廠商： Integrated Device Technology, Inc.
英文描述： WAN PLL
中文描述： 廣域網(wǎng)鎖相環(huán)
文件頁數(shù)： 80/170頁
文件大?。?/td> 1053K
代理商： IDT82V3288
IDT82V3288
WAN PLL
Programming Information
80
June 22, 2006
INTERRUPTS3_ENABLE_CNFG - Interrupt Control 3
Address: 12H
Type: Read / Write
Default Value: 00000000
Bit
Name
Description
7
EX_SYNC_ALARM
This bit controls whether the interrupt is enabled to be reported on the INT_REQ pin when an external sync alarm has
occurred, i.e., when the EX_SYNC_ALARM bit (b7, 0FH) is ‘1’.
0: Disabled. (default)
1: Enabled.
This bit controls whether the interrupt is enabled to be reported on the INT_REQ pin when the T4 DPLL locking status
changes (from ‘locked’ to ‘unlocked’ or from ‘unlocked’ to ‘locked’), i.e., when the T4_STS bit (b6, 0FH) is ‘1’.
0: Disabled. (default)
1: Enabled.
This bit controls whether the interrupt is enabled to be reported on the INT_REQ pin when OSCI fails, i.e., when the
OSCI_ALARM bit (b5, 0FH) is ‘1’.
0: Disabled. (default)
1: Enabled.
This bit controls whether the interrupt is enabled to be reported on the INT_REQ pin when all the input clocks for T4 path
change to be unqualified, i.e., when the INPUT_TO_T4 bit (b4, 0FH) is ‘1’.
0: Disabled. (default)
1: Enabled.
This bit controls whether the interrupt is enabled to be reported on the INT_REQ pin when IN2 has AMI violation, i.e., when the
AMI2_VIOL bit (b3, 0FH) is ‘1’.
0: Disabled. (default)
1: Enabled.
This bit controls whether the interrupt is enabled to be reported on the INT_REQ pin when IN2 has LOS error, i.e., when the
AMI2_LOS bit (b2, 0FH) is ‘1’.
0: Disabled. (default)
1: Enabled.
This bit controls whether the interrupt is enabled to be reported on the INT_REQ pin when IN1 has AMI violation, i.e., when the
AMI1_VIOL bit (b1, 0FH) is ‘1’.
0: Disabled. (default)
1: Enabled.
This bit controls whether the interrupt is enabled to be reported on the INT_REQ pin when IN1 has LOS error, i.e., when the
AMI1_LOS bit (b0, 0FH) is ‘1’.
0: Disabled. (default)
1: Enabled.
6
T4_STS
5
OSCI_ALARM
4
INPUT_TO_T4
3
AMI2_VIOL
2
AMI2_LOS
1
AMI1_VIOL
0
AMI1_LOS
7
6
5
4
3
2
1
0
EX_SYNC_ALARM
T4_STS
OSCI_ALARM
INPUT_TO_T4
AMI2_VIOL
AMI2_LOS
AMI1_VIOL
AMI1_LOS
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT82V3288BC 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:WAN PLL
IDT82V3288BCG 功能描述:IC PLL WAN 3E STRATUM 2 208CABGA RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
IDT82V3352 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:SYNCHRONOUS ETHERNET WAN PLL
IDT82V3355 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:SYNCHRONOUS ETHERNET WAN PLL
IDT82V3355DKG 功能描述:IC PLL WAN SYNC ETH 64-TQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:- 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT
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