參數(shù)資料
型號(hào)： IDT82P2821BH
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 68/151頁
文件大?。?/td> 0K
描述： IC LIU T1/J1/E1 21+1CH 640-PBGA
標(biāo)準(zhǔn)包裝： 5
功能： 線路接口單元（LIU）
接口： E1，J1，T1
電路數(shù)： 1
電源電壓： 1.8V, 3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 640-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 640-PBGA-EP（31x31）
包裝： 托盤
包括： 缺陷和警報(bào)檢測，驅(qū)動(dòng)器過流檢測和保護(hù)，LLOS 檢測，PRBSARB / IB 檢測和生成
其它名稱： 82P2821BH
IDT82P2821
21(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Pin Description
23
February 6, 2009
REFA
Output
AK18
REFA: Reference Clock Output A
REFA can output three kinds of clocks: a recovered clock of one of the 22 channels, an exter-
nal clock input on CLKA or a free running clock. The clock frequency is programmable. Refer
The output on REFA can also be disabled, as determined by the REFA_EN bit (b6, REFA).
When the output is disabled, REFA is in High-Z state.
REFB
Output
AJ18
REFB: Reference Clock Output B
REFB can output a recovered clock of one of the 22 channels, an external clock input on
CLKB or a free running clock. Refer to Section 3.6.2 Clock Outputs on REFA/REFB for
details.
The output on REFB can also be disabled, as determined by the REFB_EN bit (b6, REFB).
When the output is disabled, REFB is in High-Z state.
CLKA
Input
AH17
CLKA: External T1/E1 Clock Input A
External T1/J1 (1.544 MHz) or E1 (2.048 MHz) clock is input on this pin. The CKA_T1E1 bit
(b5, REFA) should be set to match the clock frequency.
When not used, this pin should be connected to GNDD.
CLKB
Input
AG17
CLKB: External T1/E1 Clock Input B
External T1/J1 (1.544 MHz) or E1 (2.048 MHz) clock is input on this pin. The CKB_T1E1 bit
(b5, REFB) should be set to match the clock frequency.
When not used, this pin should be connected to GNDD.
Common Control
VCOM[0]
VCOM[1]
Output
R4
P28
VCOM: Voltage Common Mode [1:0]
These pins are used only when the receive line interface is in Receive Differential mode and
connected without a transformer (transformer-less).
To enable these pins, the VCOMEN pin must be connected high. Refer to Figure-10 for the
connection.
When these pins are not used, they should be left open.
VCOMEN
Input
(Pull-Down)
AF26
VCOMEN: Voltage Common Mode Enable
This pin should be connected high only when the receive line interface is in Receive Differen-
tial mode and connected without a transformer (transformer-less).
When not used, this pin should be left open.
REF
-
D29
REF: Reference Resistor
An external resistor (10 K
, ±1%) is used to connect this pin to ground to provide a standard
reference current for internal circuit. This resistor is required to ensure correct device opera-
tion.
RIM
Input
(Pull-Down)
AH10
RIM: Receive Impedance Matching
In Receive Differential mode, when RIM is low, all 22 receivers become High-Z and only exter-
nal impedance matching is supported. In this case, the per-channel impedance matching con-
figuration bits - the R_TERM[2:0] bits (b2~0, RCF0,...) and the R120IN bit (b4, RCF0,...) - are
ignored.
In Receive Differential mode, when RIM is high, impedance matching is configured on a per-
channel basis by the R_TERM[2:0] bits (b2~0, RCF0,...) and the R120IN bit (b4, RCF0,...).
This pin can be used to control the receive impedance state for Hitless Protection applica-
In Receive Single Ended mode, this pin should be left open.
Name
I / O
Pin No.
Description
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