參數(shù)資料
型號： IDT82P20416DBFG
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 51/121頁
文件大小： 0K
描述： IC LIU T1/E1/J1 16CH SH 484BGA
標(biāo)準(zhǔn)包裝： 84
功能： 線路接口單元（LIU）
接口： E1，J1，T1
電路數(shù)： 16
電源電壓： 1.8V, 3.3V
功率（瓦特）： 3.10W
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 484-LFBGA
供應(yīng)商設(shè)備封裝： 484-CABGA（19x19）
包裝： 托盤
包括： AIS 警報(bào)檢測器和發(fā)生器，回送功能，PRBS 發(fā)生器 / 檢測器，遠(yuǎn)程檢測器和發(fā)生器
IDT82P20416
16-CHANNEL SHORT HAUL T1/E1/J1 LINE INTERFACE UNIT
Functional Description
35
December 17, 2009
3.5.3.2 System LOS (SLOS)
SLOS can only be detected when the transmit system interface is in
Dual Rail NRZ Format mode or in Dual Rail RZ Format mode.
The amplitude and density of the data input from the transmit system
side are monitored. When the input ‘0’s are equal to or more than N
consecutive pulse intervals, SLOS is declared. When the average
density of marks is at least 12.5% for M consecutive pulse intervals
starting with a mark, SLOS is cleared. Here N and M are defined by the
LAC bit (b7, LOS,...). Refer to Table-18 for details.
In T1/J1 mode, SLOS detection supports ANSI T1.231 and I.431. In
E1 mode, SLOS detection supports G.775 and ETSI 300233/I.431. The
criteria are selected by the LAC bit (b7, LOS,...).
When SLOS is detected, the SLOS_S bit (b1, STAT0,...) will be set. A
transition from ‘0’ to ‘1’ on the SLOS_S bit (b1, STAT0,...) or any transi-
tion (from ‘0’ to ‘1’ or from ‘1’ to ‘0’) on the SLOS_S bit (b1, STAT0,...) will
set the SLOS_IS bit (b1, INTS0,...) to ‘1’, as selected by the LOS_IES bit
(b1, INTES,...). When the SLOS_IS bit (b1, INTS0,...) is ‘1’, an interrupt
will be reported by INT if not masked by the SLOS_IM bit (b1, INTM0,...).
SLOS may be counted by an internal Error Counter. Refer to
Table-18 SLOS Criteria
Operation
Mode
LAC
Criteria
SLOS Declaring 1
SLOS Clearing 1
T1/J1
0
ANSI T1.231
no pulse detected for N consecutive pulse intervals,
N = 175 bits
12.5% mark density with less than 100 consecutive
zeros for M consecutive pulse intervals,
M = 175 bits
1
ANSI I.431
no pulse detected for N consecutive pulse intervals,
N = 1544 bits
12.5% mark density with less than 100 consecutive
zeros for M consecutive pulse intervals,
M = 175 bits
E1
0
G.775
no pulse detected for N consecutive pulse intervals,
N = 32 bits
12.5% mark density with less than 16 consecutive
zeros for M consecutive pulse intervals,
M = 32 bits
1
ETSI 300233/
I.431
no pulse detected for N consecutive pulse intervals,
N = 2048 bits
12.5% mark density with less than 16 consecutive
zeros for M consecutive pulse intervals,
M = 32 bits
Note:
1. System input ports are schmitt-trigger inputs)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT82P20416DBFG8 制造商:Integrated Device Technology Inc 功能描述:IC LIU T1/E1/J1 16CH SH 484BGA
IDT82P20416DBFGBLANK 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:16-Channel Short Haul T1/E1/J1 Line Interface Unit
IDT82P20516 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:16-Channel Short Haul E1 Line Interface Unit
IDT82P20516BFBLANK 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:16-Channel Short Haul E1 Line Interface Unit
IDT82P20516BFGBLANK 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:16-Channel Short Haul E1 Line Interface Unit
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