參數(shù)資料
型號(hào): IDT821068PX
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 編解碼器
英文描述: OCTAL PROGRAMMABLE PCM CODEC
中文描述: A/MU-LAW, PROGRAMMABLE CODEC, PQFP128
封裝: PLASTIC, QFP-128
文件頁(yè)數(shù): 32/45頁(yè)
文件大?。?/td> 589K
代理商: IDT821068PX
INDUSTRIAL TEMPERATURE RANGE
IDT821068 OCTAL PROGRAMMABLE PCM CODEC
32
5. Dual Tone Frequency Setting (04H, 05H, 06H/84H, 85H, 86H), Read/Write
The decimal value of Dual Tone Frequency Setting bits (T0[11:0]) is the frequency of Tone0 on corresponding channel. The decimal value of
T1[11:0] bits is the Tone1 frequency on corresponding channel.
6. Tone Enable and Tone Gain (07H/87H), Read/Write
Tone Gain bits (TG[5:0]) are used to determine the gain of dual tone signal on corresponding channel.
G = 20
×
lg(Tg
×
2/256) + 3.14
where: G is the desired tone gain, and Tg is the decimal value of TG[5:0].
Tone 1 Enable and Tone 0 Enable bits T1E and T0E are used to activate tone 1 or tone 0 on corresponding channels.
T1E = 0: Tone1 is disabled at the peak value in phase 90 degree (default);
T1E = 1: Tone1 is enabled at zero-crossing;
T0E = 0: Tone0 is disabled at the peak value in phase 90 degree (default);
T0E = 1: Tone0 is enabled at zero-crossing.
7. Transmit Time slot and Transmit Highway Selection (08H/88H), Read/Write (For MPI mode only)
Transmit Time slot bits (TT[6:0]) determine which time slot will be used to transmit data for corresponding channel. The valid value is 0d -
127d corresponding to TS0 to TS127. The default value of TT[6:0] is N for Channel N+1 (N = 0 to 7).
Transmit Highway Selection bit (THS) selects the PCM highway on corresponding channel to transmit voice data.
THS = 0: DX1 is selected (default);
THS = 1: DX2 is selected.
8. Receive Time slot and Highway Selection (09H/89H), Read/Write (For MPI mode only)
Receive Time slot bits RT[6:0] determine which time slot will be used to receive data for corresponding channel. The valid value is 0d - 127d
corresponding to TS0 to TS127. The default value of RT[6:0] is N for Channel N+1 (N = 0 to 7).
Receive Highway Selection bit RHS selects the PCM highway on corresponding channel to receive voice data.
RHS = 0: DR1 is selected (default);
RHS = 1: DR2 is selected.
9. Channel I/O Data (0AH/8AH), Read/Write (For MPI mode only)
Channel I/O Data bits contain the information of SLIC I/O pins SI1, SI2, SB1, SB2, SO1, SO2 and SO3 on corresponding channel. Default
value is ‘0d’. It should be noted that both SB1 and SB2 are read only in this command.
b7
R
/W
T0[7]
b6
0
b5
0
b4
0
b3
0
b2
1
b1
0
b0
0
Command
I/O data
T0[6]
T0[5]
T0[4]
T0[3]
T0[2]
T0[1]
T0[0]
b7
R
/W
T1[3]
b6
0
b5
0
b4
0
b3
0
b2
1
b1
0
b0
1
Command
I/O data
T1[2]
T1[1]
T1[0]
T0[11]
T0[10]
T0[9]
T0 [8]
b7
R
/W
T1[11]
b6
0
b5
0
b4
0
b3
0
b2
1
b1
1
b0
0
Command
I/O data
T1[10]
T1[9]
T1[8]
T1[7]
T1[6]
T1[5]
T1[4]
b7
R
/W
T1E
b6
0
T0E
b5
0
b4
0
b3
0
b2
1
b1
1
b0
1
Command
I/O data
TG[5]
TG[4]
TG[3]
TG[2]
TG[1]
TG[0]
b7
R
/W
THS
b6
0
b5
0
b4
0
b3
1
b2
0
b1
0
b0
0
Command
I/O data
TT[6]
TT[5]
TT[4]
TT[3]
TT[2]
TT[1]
TT[0]
b7
R
/W
RHS
b6
0
b5
0
b4
0
b3
1
b2
0
b1
0
b0
1
Command
I/O data
RT[6]
RT[5]
RT[4]
RT[3]
RT[2]
RT[1]
RT[0]
b7
R
/W
R
b6
0
SO3
b5
0
SO2
b4
0
SO1
b3
1
SI1
b2
0
SI2
b1
1
SB1
b0
0
SB2
Command
I/O data
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